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| 型號： | i960 VH |
| 廠商： | Intel Corp. |
| 英文描述： | Embedded-PCI Processor(嵌入式PCI處理器) |
| 中文描述： | 嵌入式PCI處理器（嵌入式處理器的PCI） |
| 文件頁數(shù)： | 1/64頁 |
| 文件大?。?/td> | 851K |
| 代理商： | I960 VH |
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i960
VH Embedded-PCI Processor
Preliminary
Datasheet
Product Features
I
High Performance 80960JT Core
—Sustained One Instruction/Clock
Execution
—16 Kbyte Two-Way Set-Associative
Instruction Cache
—4 Kbyte Direct-Mapped Data Cache
—Sixteen 32-Bit Global Registers
—Sixteen 32-Bit Local Registers
—Programmable Bus Widths:
8-, 16-, 32-Bit
—1 Kbyte Internal Data RAM
—Local Register Cache
(Eight Available Stack Frames)
—Two 32-Bit On-Chip Timer Units
—Core Clock Rate: 1x, 2x or 3x Local Bus
Clock
I
PCI Interface
—Complies with PCI Local Bus
Specification 2.2
—Runs at Local Bus Clock Rate
—5 Volts PCI Signaling Environment
I
Address Translation Unit
—Connects Local Bus to PCI Bus
—Inbound/Outbound Address Translation
Support
—Direct Outbound Addressing Support
I
Messaging Unit
—Four Message Registers
—Two Doorbell Registers
I
Memory Controller
—256 Mbytes of 32- or 36-Bit DRAM
—Interleaved or Non-Interleaved DRAM
—Fast Page-Mode DRAM Support
—Extended Data Out DRAM Support
—Two Independent Banks for SRAM /
ROM / Flash (16 Mbytes/Bank; 8- or
32-Bit)
I
DMA Controller
—Two Independent Channels
—PCI Memory Controller Interface
—32-Bit Local Bus Addressing
—64-Bit PCI Bus Addressing
—Independent Interface to PCI Bus
—132 Mbyte/sec Burst Transfers to PCI
and Local Buses
—Direct Addressing to and from PCI
Buses
—Unaligned Transfers Supported in
Hardware
—Channels Dedicated to PCI Bus
I
I
2
C Bus Interface Unit
—Serial Bus
—Master/Slave Capabilities
—System Management Functions
I
3.3 V Supply
—5 V Tolerant Inputs
—TTL Compatible Outputs
I
Plastic BGA* Package
—324 Ball-Grid Array (PBGA)
Order Number: 273179-004
April 1999
Notice:
This document contains preliminary information on new products in production. The
specifications are subject to change without notice. Verify with your local Intel sales office that
you have the latest datasheet before finalizing a design.
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