參數(shù)資料
型號(hào)： HYS72D32000GR-7-A
廠商： INFINEON TECHNOLOGIES AG
英文描述： Connectors, PCB header and jumpers Multipole
中文描述： 2.5伏184針注冊(cè)的DDR - SDRAM內(nèi)存模塊我
文件頁(yè)數(shù)： 14/25頁(yè)
文件大?。?/td> 315K
代理商： HYS72D32000GR-7-A
HYS 72Dxx0xxGR-7/8-A
Registered DDR-I SDRAM-Modules
INFINEON Technologies
14
2002-05-08 (revision 1.0)
SPD Codes
256MB
x72
1bank
-7
HE
X
80
08
07
0D
0A
01
48
00
04
70
75
02
82
08
08
256MB
x72
1bank
-8
HE
X
80
08
07
0D
0A
01
48
00
04
80
80
02
82
08
08
512MB
x72
1bank
-7
HE
X
80
08
07
0D
0B
01
48
00
04
70
75
02
82
04
04
512MB
x72
1bank
-8
HE
X
80
08
07
0D
0B
01
48
00
04
80
80
02
82
04
04
512MB
x72
2bank
-7
HE
X
80
08
07
0D
0A
02
48
00
04
70
75
02
82
08
08
512MB
x72
2bank
-8
HE
X
80
08
07
0D
0A
02
48
00
04
80
80
02
82
08
08
1GB
x72
2bank
-7
HE
X
80
08
07
0D
0B
02
48
00
04
70
75
02
82
04
04
1GB
x72
2bank
-8
HE
X
80
08
07
0D
0B
02
48
00
04
80
80
02
82
04
04
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Number of SPD Bytes
Total Bytes in Serial PD
Memory Type
Number of Row Addresses
Number of Column Addresses
Number of DIMM Banks
Module Data Width
Module Data Width (cont’d)
Module Interface Levels
SDRAM Cycle Time at CL = 2.5
Access Time from Clock at CL = 2.5
DIMM Config
Refresh Rate
/
Type
SDRAM Width, Primary
Error Checking SDRAM Data Width
Minimum Clock Delay for Back-to-Back
Random Column Address
Burst Length Supported
Number of SDRAM Banks
Supported CAS Latencies
CS Latencies
WE Latencies
SDRAM DIMM Module Attributes
128
256
DDR-SDRAM
13
10
/
11
1
/
2
x72
0
SSTL_2.5
7ns
/
8ns
0.75ns
/
0.8ns
ECC
Self-Refresh, 7.8ms
x8
/
x4
na
15
tccd = 1 CLK
01
01
01
01
01
01
01
01
16
17
18
1
9
20
21
2, 4 & 8
4
0E
04
0C
01
02
26
0E
04
0C
01
02
26
0E
04
0C
01
02
26
0E
04
0C
01
02
26
0E
04
0C
01
02
26
0E
04
0C
01
02
26
0E
04
0C
01
02
26
0E
04
0C
01
02
26
CAS latency = 2 & 2.5
CS latency = 0
Write latency = 1
registered
Concurrent Auto
Precharge
7.5ns
/
10ns
0.75ns
/
0.8ns
not supported
not supported
20ns
15ns
20ns
45ns
/
50ns
256MByte
/
512MByte
0.
9
ns
/
1.1ns
0.
9
ns
/
1.1ns
0.5ns
/
0.6ns
0.5ns
/
0.6ns
–
65ns
/
70ns
75ns
/
80ns
12ns
0.5ns
/
0.6ns
0.75ns
/
1.0ns
–
Revision 0.0
–
–
22
SDRAM Device Attributes: General
C0
C0
C0
C0
C0
C0
C0
C0
23
24
25
26
27
28
2
9
30
31
32
33
34
35
Min. Clock Cycle Time at CAS Latency = 2
Access Time from Clock for CL = 2
Minimum Clock Cycle Time at CL = 1.5
Access Time from Clock at CL = 1.5
Minimum Row Precharge Time
Minimum Row Act. to Row Act. Delay tRRD
Minimum RAS to CAS Delay tRCD
Minimum RAS Pulse Width tRAS
Module Bank Density (per bank)
Addr. and Command Setup Time
Addr. and Command Hold Time
Data Input Setup Time
Data Input Hold Time
Superset Information
Minimum Core Cycle Time tRC
Min. Auto Refresh Cmd Cycle Time tRFC
Maximum Clock Cycle Time tck
Max. D
Q
S-D
Q
Skew tD
Q
S
Q
X
-Factor t
Q
HS
Superset Information
SPD Revision
Checksum for Bytes 0 - 62
Manufacturers JEDEC ID Code
75
75
00
00
50
3C
50
2D
40
9
0
9
0
50
50
00
41
4B
30
32
75
00
00
CA
C1
INFI-
NEON
A0
80
00
00
50
3C
50
32
40
B0
B0
60
60
00
46
50
30
3C
A0
00
00
BF
C1
INFI-
NEON
75
75
00
00
50
3C
50
2D
80
9
0
9
0
50
50
00
41
4B
30
32
75
00
00
03
C1
INFI-
NEON
A0
80
00
00
50
3C
50
32
80
B0
B0
60
60
00
46
50
30
3C
A0
00
00
F8
C1
INFI-
NEON
75
75
00
00
50
3C
50
2D
40
9
0
9
0
50
50
00
41
4B
30
32
75
00
00
CB
C1
INFI-
NEON
A0
80
00
00
50
3C
50
32
40
B0
B0
60
60
00
46
50
30
3C
A0
00
00
C0
C1
INFI-
NEON
75
75
00
00
50
3C
50
2D
80
9
0
9
0
50
50
00
41
4B
30
32
75
00
00
04
C1
INFI-
NEON
A0
80
00
00
50
3C
50
32
80
B0
B0
60
60
00
46
50
30
3C
A0
00
00
F
9
C1
INFI-
NEON
36-40
41
42
43
44
45
46-61
62
63
64
65-71
Manufacturer
–
72
Module Assembly Location
Module Part Number
Module Revision Code
Module Manufacturing Date
Module Serial Number
–
–
–
–
–
–
–
73-
9
0
9
1-
9
2
9
3-
9
4
9
5-
9
8
99
-127
Byte
#
Description
相關(guān)PDF資料
PDF描述
HYS72D128020GR-8-A Cable Termination Tool; For Use With:MediaFlex and Interface Outlets, GigaFlex Modules; Connector Type:Modular RoHS Compliant: NA
HYS72D128020GR-8-B Connector Wall Plate; Color:Almond; Leaded Process Compatible:Yes; No. of Ports:2 RoHS Compliant: Yes
HYS72D32000GR-8-A Connectors, PCB header and jumpers Multipole RoHS Compliant: Yes
HYS72D64000GR-8-A 2.5 V 184-pin Registered DDR-I SDRAM Modules
HYS72D64020GR-8-A 2.5 V 184-pin Registered DDR-I SDRAM Modules
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYS72D32000GR-7-B 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:2.5 V 184-pin Registered DDR-I SDRAM Modules
HYS72D32000GR-8-A 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:2.5 V 184-pin Registered DDR-I SDRAM Modules
HYS72D32000GR-8-B 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:2.5 V 184-pin Registered DDR-I SDRAM Modules
HYS72D32000GU-7-A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:?256MB (32Mx72) PC2100 1-bank?
HYS72D32000GU-7-B 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:184-Pin Unbuffered Dual-In-Line Memory Modules
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