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參數(shù)資料
| 型號(hào)： | HYS72D128020GR-8-B |
| 廠(chǎng)商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | Connector Wall Plate; Color:Almond; Leaded Process Compatible:Yes; No. of Ports:2 RoHS Compliant: Yes |
| 中文描述： | 2.5伏184針注冊(cè)的DDR - SDRAM內(nèi)存模塊我 |
| 文件頁(yè)數(shù)： | 8/25頁(yè) |
| 文件大?。?/td> | 315K |
| 代理商： | HYS72D128020GR-8-B |
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HYS 72Dxx0xxGR-7/8-A
Registered DDR-I SDRAM-Modules
INFINEON Technologies
8
2002-05-08 (revision 1.0)
Block Diagram: Two Bank 128Mb x 72 DDR-I SDRAM DIMM Modules
HYS 72D128020GR using x4 Organized SDRAMs on Raw Card Version C
PC
K
PC
K
Q
D
S0
D
Q
S4
D
Q
S6
D
Q
S2
D
Q
0
D
Q
1
D
Q
2
D
Q
3
D
Q
8
D
Q9
D
Q
10
D
Q
11
D
Q
16
D
Q
17
D
Q
18
D
Q
1
9
D
Q
24
D
Q
25
D
Q
26
D
Q
27
D
Q
32
D
Q
33
D
Q
34
D
Q
35
D
Q
40
D
Q
41
D
Q
42
D
Q
43
D
Q
56
D
Q
57
D
Q
58
D
Q
5
9
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D0
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D1
D2
D3
D4
D5
D7
D
Q
48
D
Q
4
9
D
Q
50
D
Q
51
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D6
D
Q
4
D
Q
5
D
Q
6
D
Q
7
D
Q
12
D
Q
13
D
Q
14
D
Q
15
D
Q
20
D
Q
21
D
Q
22
D
Q
23
D
Q
28
D
Q
2
9
D
Q
30
D
Q
31
D
Q
36
D
Q
37
D
Q
38
D
Q
3
9
D
Q
44
D
Q
45
D
Q
46
D
Q
47
D
Q
60
D
Q
61
D
Q
62
D
Q
63
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
9
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
DM0
/
D
Q
S
9
D10
D11
D12
D13
D14
D16
D
Q
52
D
Q
53
D
Q
54
D
Q
55
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D15
CK0, CK 0 --------- PLL
*
CS
CS
CS
CS
CS
CS
CS
CS
CS
CS
CS
S
CS
CS
CS
CS
CS1
BA0-BA1
A0-A12
RAS
CAS
CKE0
CKE1
RS1 -
>
CS : SDRAMs D18 -D35
RBA0-RBA1 -
>
BA0-BA1: SDRAMs D0-D35
RA0-RA12 -
>
A0-A12: SDRAMs D0 - D35
RRAS -
>
RAS: SDRAMs D0 - D35
RCAS -
>
CAS: SDRAMs D0 - D35
RCKE0 -
>
CKE: SDRAMs D0 - D17
RCKE1 -
>
CKE: SDRAMs D18 - D35
CS0
RS0 -
>
CS : SDRAMs D0-D17
VSS
D
Q
S1
D
Q
S3
DM
DM
DM
DM
DM
DM
DM
DM
DM
DM
DM
DM
DM
DM
DM
DM
D
Q
S5
D
Q
S7
DM6
/
D
Q
S15
DM5
/
D
Q
S14
DM4
/
D
Q
S13
DM1
/
D
Q
S10
DM2
/
D
Q
S11
DM3
/
D
Q
S12
DM7
/
D
Q
S16
*
Wire per Clock Loading Table
/
Wiring Diagrams
WE
RWE -
>
WE: SDRAMs D0 - D35
R
E
G
I
S
T
E
R
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D18
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D1
9
D20
D21
D22
D23
D25
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D24
CS
CS
CS
CS
CS
CS
CS
CS
DM
DM
DM
DM
DM
DM
DM
DM
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D27
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D
Q
S
D
Q
S
D
Q
S
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D28
D2
9
D30
D31
D32
D34
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D33
CS
CS
CS
CS
CS
S
CS
CS
DM
DM
DM
DM
DM
DM
DM
DM
CB0
CB1
CB2
CB3
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D8
CS
DM
D
Q
S8
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D26
CS
DM
CB4
CB5
CB6
CB7
D
Q
S
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
D17
CS
DM
DM8
/
D
Q
S17
D
Q
S
D35
CS
DM
RESET
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
I
/
O 0
I
/
O 1
I
/
O 2
I
/
O 3
Notes:
1. D
Q
-to-I
/
O wiring may be changed within a byte.
2. D
Q/
D
Q
S
/
DM
/
CKE
/
S relationships must be
maintained as shown.
3. D
Q
, D
Q
S, Adress and control resistors: 22 Ohms.
4. VDDID strap connections
STRAP OUT (OPEN): VDD = VDD
Q
5. SDRAM placement alternates between the back
and front of the DIMM.
A0
Serial PD
A1
A2
SA0 SA1 SA2
SCL
SDA
VDD,
VSS
VDDID
VDD
Q
VREF
Strap: see Note 4
VDDSPD
EEPROM
D0 - D35
D0 - D35
D0 - D35
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYS72D32000GR-8-A | Connectors, PCB header and jumpers Multipole RoHS Compliant: Yes |
| HYS72D64000GR-8-A | 2.5 V 184-pin Registered DDR-I SDRAM Modules |
| HYS72D64020GR-8-A | 2.5 V 184-pin Registered DDR-I SDRAM Modules |
| HYS72D32000GR-7-B | 2.5 V 184-pin Registered DDR-I SDRAM Modules |
| HYS72D32000GR-8-B | 2.5 V 184-pin Registered DDR-I SDRAM Modules |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS72D128020GU-7-A | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:2.5 V 184-pin Unbuffered DDR-I SDRAM Modules |
| HYS72D128020GU-8-A | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:2.5 V 184-pin Unbuffered DDR-I SDRAM Modules |
| HYS72D128021GR-7-B | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:2.5 V 184-pin Registered DDR-I SDRAM Modules |
| HYS72D128021GR-8-B | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:2.5 V 184-pin Registered DDR-I SDRAM Modules |
| HYS72D128300GBR | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:184-Pin Registered Double Data Rate SDRAM Module |
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