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參數(shù)資料
| 型號： | HYM72V12C736BLS4-K |
| 英文描述： | SDRAM|128MX72|CMOS|DIMM|168PIN|PLASTIC |
| 中文描述： | 內(nèi)存| 128MX72 |的CMOS |內(nèi)存| 168線|塑料 |
| 文件頁數(shù)： | 5/15頁 |
| 文件大?。?/td> | 215K |
| 代理商： | HYM72V12C736BLS4-K |
PC133 SDRAM Registered DIMM
Rev. 0.4/Dec. 2002
6
HYM72V12C736B(L)S4 Series
SERIAL PRESENCE DETECT
BYTE
NUMBER
FUNCTION
DESCRIPTION
FUNCTION
VALUE
NOTE
-K
-H
-K
-H
BYTE0
# of Bytes Written into Serial Memory at Module
Manufacturer
Total # of Bytes of SPD Memory Device
128 Bytes
80h
BYTE1
256 Bytes
08h
BYTE2
Fundamental Memory Type
SDRAM
04h
BYTE3
# of Row Addresses on This Assembly
13
0Dh
1
BYTE4
# of Column Addresses on This Assembly
11
0Bh
BYTE5
# of Module Banks on This Assembly
2 Bank
02h
BYTE6
Data Width of This Assembly
72 Bits
48h
BYTE7
Data Width of This Assembly (Continued)
-
00h
BYTE8
Voltage Interface Standard of This Assembly
LVTTL
01h
BYTE9
SDRAM Cycle Time @/CAS Latency=3
7.5ns
7.5ns
75h
75h
BYTE10
Access Time from Clock @/CAS Latency=3
5.4ns
5.4ns
54h
54h
BYTE11
DIMM Configuration Type
ECC
02h
BYTE12
Refresh Rate/Type
7.8125us
/ Self Refresh Supported
82h
BYTE13
Primary SDRAM Width
x4
04h
BYTE14
Error Checking SDRAM Width
Minimum Clock Delay Back to Back Random Col-
umn Address
Burst Lenth Supported
x4
04h
BYTE15
tCCD = 1 CLK
01h
BYTE16
1,2,4,8,Full Page
8Fh
2
BYTE17
# of Banks on Each SDRAM Device
4 Banks
04h
BYTE18
SDRAM Device Attributes, /CAS Lataency
/CAS Latency=2,3
06h
BYTE19
SDRAM Device Attributes, /CS Lataency
/CS Latency=0
01h
BYTE20
SDRAM Device Attributes, /WE Lataency
/WE Latency=0
01h
BYTE21
SDRAM Module Attributes
Registered/Buffered inputs, with PLL
1Fh
BYTE22
SDRAM Device Attributes, General
+/- 10% voltage tolerence, Burst Read
Single Bit Write, Precharge All, Auto
Precharge, Early RAS Precharge
0Eh
BYTE23
SDRAM Cycle Time @/CAS Latency=2
7.5ns
10ns
6ns
-
-
75h
A0h
60h
00h
00h
BYTE24
Access Time from Clock @/CAS Latency=2
5.7ns
54h
BYTE25
SDRAM Cycle Time @/CAS Latency=1
-
00h
BYTE26
Access Time from Clock @/CAS Latency=1
-
00h
BYTE27
Minimum Row Precharge Time (tRP)
15ns
20ns
0Fh
14h
BYTE28
Minimum Row Active to Row Active Delay (tRRD)
15ns
15ns
0Fh
0Fh
BYTE29
Minimum /RAS to /CAS Delay (tRCD)
15ns
20ns
0Fh
14h
BYTE30
Minimum /RAS Pulse Width (tRAS)
45ns
45ns
2Dh
2Dh
BYTE31
Module Bank Density
512MB
80h
BYTE32
Command and Address Signal Input Setup Time
1.5ns
1.5ns
15h
15h
BYTE33
Command and Address Signal Input Hold Time
0.8ns
0.8ns
08h
08h
BYTE34
Data Signal Input Setup Time
1.5ns
1.5ns
15h
15h
BYTE35
BYTE36
~61
BYTE62
Data Signal Input Hold Time
0.8ns
0.8ns
08h
08h
Superset Information (may be used in future)
-
00h
SPD Revision
Intel SPD 1.2B
12h
3, 8
BYTE63
Checksum for Byte 0~62
-
DDh
1Eh
BYTE64
BYTE65
~71
Manufacturer JEDEC ID Code
Hynix JEDED ID
ADh
....Manufacturer JEDEC ID Code
Unused
FFh
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYM72V12C736BS4 | 128Mx72|3.3V|K/H|x36|SDR SDRAM - Registered DIMM 1GB |
| HYM72V12C736BS4-H | SDRAM|128MX72|CMOS|DIMM|168PIN|PLASTIC |
| HYM72V12C736BS4-K | SDRAM|128MX72|CMOS|DIMM|168PIN|PLASTIC |
| HYM72V12C736K4 | 128Mx72|3.3V|H|x36|SDR SDRAM - Registered DIMM 1GB |
| HYM72V12C756BLS4 | 128Mx72|3.3V|P/S|x36|SDR SDRAM - Registered DIMM 1GB |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYM72V12C736BS4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Mx72|3.3V|K/H|x36|SDR SDRAM - Registered DIMM 1GB |
| HYM72V12C736BS4-H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|128MX72|CMOS|DIMM|168PIN|PLASTIC |
| HYM72V12C736BS4-K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|128MX72|CMOS|DIMM|168PIN|PLASTIC |
| HYM72V12C736K4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Mx72|3.3V|H|x36|SDR SDRAM - Registered DIMM 1GB |
| HYM72V12C756BLS4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Mx72|3.3V|P/S|x36|SDR SDRAM - Registered DIMM 1GB |
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