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參數(shù)資料
| 型號： | HYM64V8045GU-60 |
| 廠商： | SIEMENS A G |
| 元件分類： | DRAM |
| 英文描述： | 3.3V 8M x 64-Bit EDO-DRAM Module 3.3V 8M x 72-Bit EDO-DRAM Module |
| 中文描述： | 8M X 64 EDO DRAM MODULE, 60 ns, DMA168 |
| 封裝： | DIMM-168 |
| 文件頁數(shù)： | 8/17頁 |
| 文件大小： | 90K |
| 代理商： | HYM64V8045GU-60 |
HYM 64(72)V8005/45GU-50/-60
8M x 64/72 DRAM Module
Semiconductor Group
8
Absolute Maximum Ratings
Operating temperature range .........................................................................................
Storage temperature range......................................................................................
Input/output voltage ..............................................................................
Power supply voltage....................................................................................................
Power dissipation..................................................................................................................
Data out current (short circuit) ................................................................................................
0 to + 70 °C
– 55 to + 125 °C
–0.5 to min (Vcc+0.5, 4.6) V
–0.5 to 4.6 V
4.97 W
50 mA
Note
: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent
damage to the device. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
DC Characteristics
T
A
= 0 to 70 °C;
V
CC
= 3.3 V
±
0.3 V
Parameter
Symbol
x 64/ x72
Unit Notes
min.
max.
Input high voltage
V
IH
V
IL
V
OH
2.0
Vcc + 0.5 V
1)
Input low voltage
– 0.5
0.8
V
1)
Output high voltage (LVTTL)
Output H“l(fā)evel voltage (
I
OUT
= – 2 mA)
Output low voltage (LVTTL)
Output L“l(fā)evel voltage (
I
OUT
= + 2 mA)
Output high voltage (LVCMOS)
Output H“l(fā)evel voltage (
I
OUT
=– 100
μ
A)
Output low voltage (LVCMOS)
Output L“l(fā)evel voltage (
I
OUT
=+100
μ
A)
Input leakage current
(0 V <
V
IN
< Vcc, all other pins = 0 V)
Output leakage current
(DO is disabled, 0 V <
V
OUT
< Vcc)
2.4
–
V
1)
V
OL
–
0.4
V
1)
V
OH
Vcc-0.2
–
V
1)
V
OL
–
0.4
V
1)
I
I(L)
– 10
10
μ
A
1)
I
O(L)
– 10
+10
μ
A
1)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYM72V8020GS-50 | Tools, Hand Crimp; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No |
| HYM72V8030GS-50 | Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes |
| HYM72V8020GS-50- | 8M x 72-Bit Dynamic RAM Module |
| HYM72V8020GS-60 | 8M x 72-Bit Dynamic RAM Module |
| HYM72V8030GS-60 | 8M x 72-Bit Dynamic RAM Module |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYM64V8045GU-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 EDO Page Mode DRAM Module |
| HYM71V16635ALT8-H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
| HYM71V16635ALT8-K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
| HYM71V16635AT6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16Mx64|3.3V|K/H|x8|SDR SDRAM - Unbuffered DIMM 128MB |
| HYM71V16635AT8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16Mx64|3.3V|K/H|x8|SDR SDRAM - Unbuffered DIMM 128MB |
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