參數(shù)資料
型號: HYM64V8005GU-60
廠商: SIEMENS A G
元件分類: DRAM
英文描述: 3.3V 8M x 64-Bit EDO-DRAM Module 3.3V 8M x 72-Bit EDO-DRAM Module
中文描述: 8M X 64 EDO DRAM MODULE, 60 ns, DMA168
封裝: DIMM-168
文件頁數(shù): 1/17頁
文件大?。?/td> 90K
代理商: HYM64V8005GU-60
Semiconductor Group
1
3.3V 8M
×
64-Bit EDO-DRAM Module
3.3V 8M x 72-Bit EDO-DRAM Module
168pin unbuffered DIMM Module
with serial presence detect
HYM64V8005GU-50/-60
HYM64V8045GU-50/-60
HYM72V8005GU-50/-60
HYM72V8045GU-50/-60
168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-Line Memory Module
for PC main memory applications
1 bank 8M x 64, 8M x 72 in 4k and 8k refresh organisation
Optimized for byte-write non-parity or ECC applications
Extended Data Out (EDO)
Performance:
Single +3.3 V
±
0.3 V Power Supply
CAS-before-RAS refresh, RAS-only-refresh
Decoupling capacitors mounted on substrate
All inputs, outputs and clocks are fully LV-TTL compatible
Serial presence detects (optional)
Utilizes 8M
×
8 -DRAMs in TSOPII packages
4096 refresh cycles / 64 ms with 12 / 11 addressing (Row / Column) for HYM64/72V8005GU
8192 refresh cycles / 128 ms with 13 / 10 addressing (Row / Column) for HYM64/72V8045GU
Gold contact pad
Card Size: 133,35mm x 25,40 mm x 4,00 mm
This DRAM product module family is intended to be fully pin and architecture compatible
with the 168pin unbuffered SDRAM DIMM module family
-50
-60
tRAC
RAS Access Time
50 ns
60 ns
tCAC
CAS Access Time
13 ns
15 ns
tAA
Access Time from Address
25 ns
30 ns
tRC
Cycle Time
84 ns
104 ns
tHPC
EDO Mode Cycle Time
20 ns
25 ns
2.97
相關(guān)PDF資料
PDF描述
HYM64V8045GU-50 3.3V 8M x 64-Bit EDO-DRAM Module 3.3V 8M x 72-Bit EDO-DRAM Module
HYM64V8045GU-60 3.3V 8M x 64-Bit EDO-DRAM Module 3.3V 8M x 72-Bit EDO-DRAM Module
HYM72V8020GS-50 Tools, Hand Crimp; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No
HYM72V8030GS-50 Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes
HYM72V8020GS-50- 8M x 72-Bit Dynamic RAM Module
相關(guān)代理商/技術(shù)參數(shù)
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