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參數(shù)資料
| 型號(hào)： | HYM362140GS-60 |
| 廠商： | SIEMENS A G |
| 元件分類： | DRAM |
| 英文描述： | 2M x 36-Bit Dynamic RAM Module |
| 中文描述： | 2M X 36 FAST PAGE DRAM MODULE, 60 ns, SMA72 |
| 封裝： | SIMM-72 |
| 文件頁數(shù)： | 9/9頁 |
| 文件大?。?/td> | 161K |
| 代理商： | HYM362140GS-60 |
Semiconductor Group
609
Notes:
1) All voltages are referenced to
V
SS
.
2)
I
CC1
,
I
CC3
,
I
CC4
and
I
CC6
depend on cycle rate.
3)
I
CC1
and
I
CC4
depend on output loading.
Specified values are measured with the output open.
4) An initial pause of 200
μ
s is required after power-up followed by 8 RAS cycles out of which at least one cycle
has to be a refresh cycle before proper device operation is achieved. In case of using internal refresh counter,
a minimum of 8 CAS-before-RAS initialization cycles instead of 8 RAS cycles are required.
5)
V
IH (max)
and
V
IL (max)
are reference levels for measuring timing of input signals.
Transition times are also measured between
V
IH
and
V
IL
.
6) Measured with a load equivalent of 2 TTL loads and 100 pF.
7)
t
OFF (max)
defines the time at which the output achieves the open-circuit condition and is not referenced to output
voltage levels.
8) Either
t
RCH
or
t
RRH
must be satisfied for a read cycle.
9) These parameters are referenced to the CAS leading edge.
10)
t
WCS
is not a restrictive operating parameter. This is included in the data sheet as electrical characteristic only.
If
t
WCS
>
t
WCS (min)
, the cycle is an early write cycle and data out pin will remain open (high impedance).
11) Operation within the
t
RCD (max)
limit insures that
t
RAC (max)
can be met.
t
RCD (max)
is specified as a reference point
only. If
t
RCD
is greater than the specified
t
RCD (max)
limit, then access time is controlled by
t
CAS
.
12) Operation within the
t
RAD (max)
limit insures that
t
RAC (max)
can be met.
t
RAD (max)
is specified as a reference point
only. If
t
RAD
is greater than the specified
t
RAD (max)
limit, then access time is controlled by
t
AA
.
13) For CAS-before-RAS cycles only.
HYM 362140S/GS-60/-70
2M x 36-Bit
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYM362140GS-70 | 2M x 36-Bit Dynamic RAM Module |
| HYM362140S | 2M x 36-Bit Dynamic RAM Module |
| HYM362140S-60 | 2M x 36-Bit Dynamic RAM Module |
| HYM362140S-70 | 2M x 36-Bit Dynamic RAM Module |
| HYM364020GS-60 | 4M x 36-Bit Dynamic RAM Module |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYM362140GS-70 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:2M x 36-Bit Dynamic RAM Module |
| HYM362140S | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:2M x 36-Bit Dynamic RAM Module |
| HYM362140S-60 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:2M x 36-Bit Dynamic RAM Module |
| HYM362140S-70 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:2M x 36-Bit Dynamic RAM Module |
| HYM362500S-80 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x36 Fast Page Mode DRAM Module |
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