參數(shù)資料
型號(hào): HYM324000GD-50
廠商: SIEMENS A G
元件分類: DRAM
英文描述: CAP 0.5PF 50V +/-0.2PF THIN-FILM SN96/AG4/NI 30PPM TR-7-PA
中文描述: 4M X 32 FAST PAGE DRAM MODULE, 50 ns, ZMA72
封裝: DIMM-72
文件頁(yè)數(shù): 4/6頁(yè)
文件大?。?/td> 27K
代理商: HYM324000GD-50
Semiconductor Group
184
HYM324000GD-50/-60
4M x 32 SO-DIMM
Absolute Maximum Ratings
1
)
Operating temperature range..............................................................................................0 to 70 C
Storage temperature range.........................................................................................– 55 to 150 C
Soldering temperature.............................................................................................................260 C
Soldering time..............................................................................................................................10 s
Input/output voltage..................................................................................-0.5 to min (Vcc+0.5,4.6) V
Power supply voltage....................................................................................................-0.5V to 4.6 V
Power dissipation......................................................................................................................1.0 W
Data out current (short circuit)..................................................................................................50 mA
DC Characteristics
T
A
= 0 to 70 C,
V
SS
= 0 V,
V
CC
= 3 V
±
0.3 V
Parameter
Symbol
Limit Values
Unit Note
min.
max.
Input high voltage
V
IH
V
IL
V
OH
2.0
Vcc+0.3
V
2)
Input low voltage
– 0.3
0.8
V
2)
Output high voltage (LVTTL)
Output H“ level voltage (Iout = -2mA)
2.4
V
Output low voltage (LVTTL)
Output L“l(fā)evel voltage (Iout = +2mA)
V
OL
0.4
V
Output high voltage (LVCMOS)
Output H“ level voltage (Iout = -100uA)
V
OH
Vcc-0.2 -
V
6)
Ouput low voltage (LVCMOS)
Output L“ level voltage (Iout = +100uA)
V
OL
-
0.2
V
6)
Input leakage current,any input
(0 V <
V
in < Vcc , all other pins = 0 V
Output leakage current
(DO is disabled, 0 V <
Vout
< Vcc )
Average
Vcc
supply current:
-50 ns version
-60 ns version
(RAS, CAS, address cycling: tRC = tRC min.)
Standby Vcc supply current
(RAS=CAS=
V
ih)
Average
V
cc supply current, during RAS-only
refresh cycles:
I
I(L)
– 10
10
μ
A
I
O(L)
– 10
10
μ
A
I
CC1
280
240
mA
mA
3) 4) 5)
I
CC2
4
mA
-50 ns version
-60 ns version
(RAS cycling: CAS =
V
IH: tRC = tRC min.)
I
CC3
280
240
mA
mA
3) 5)
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