參數(shù)資料
型號: HYB3164165BTL-50
廠商: SIEMENS A G
元件分類: DRAM
英文描述: 4M x 16-Bit Dynamic RAM
中文描述: 4M X 16 EDO DRAM, 50 ns, PDSO50
封裝: 0.400 INCH, PLASTIC, TSOP2-50
文件頁數(shù): 11/29頁
文件大?。?/td> 284K
代理商: HYB3164165BTL-50
Semiconductor Group
11
HYB3164(5/6)165AT(L)-40/-50/-60
4M x 16 EDO-DRAM
Read command hold time
referenced to RAS
t
RRH
0
0
0
ns
11
CAS to output in low-Z
t
CLZ
t
OFF
t
OEZ
t
DZC
t
DZO
t
CDD
t
ODD
0
0
0
ns
8
Output buffer turn-off delay
0
10
0
13
0
15
ns
12
Output buffer turn-off delay from OE
0
10
0
13
0
15
ns
12
Data to CAS low delay
0
0
0
ns
13
Data to OE low delay
0
0
0
ns
13
CAS high to data delay
10
13
15
ns
14
OE high to data delay
10
13
15
ns
14
Write Cycle
Write command hold time
t
WCH
t
WP
t
WCS
t
RWL
t
CWL
t
DS
t
DH
5
7
10
ns
Write command pulse width
Write command setup time
5
0
7
0
10
0
ns
ns
15
Write command to RAS lead time
6
8
10
ns
Write command to CAS lead time
6
8
10
ns
Data setup time
0
0
0
ns
16
Data hold time
5
7
10
ns
16
Read-modify-Write Cycle
Read-write cycle time
t
RWC
t
RWD
t
CWD
t
AWD
t
OEH
89
109
133
ns
RAS to WE delay time
52
65
77
ns
15
CAS to WE delay time
22
28
32
ns
15
Column address to WE delay time
32
40
47
ns
15
OE command hold time
5
7
10
ns
Hyper Page Mode (EDO) Cycle
Hyper page mode (EDO) cycle time
t
HPC
t
CPA
t
COH
16
20
24
ns
Access time from CAS precharge
22
27
32
ns
7
Output data hold time
3
5
5
ns
AC Characteristics
(cont’d)
5)6)
AC64-2E
T
A
= 0 to 70 °C,
V
CC
= 3.3 V
±
0.3V ,
t
T
= 2 ns
Parameter
Symbol
Limit Values
Unit
Note
- 40
- 50
- 60
min.
max.
min.
max.
min.
max.
相關(guān)PDF資料
PDF描述
HYB3165165BTL-50 4M x 16-Bit Dynamic RAM
HYB3166165BTL-50 4M x 16-Bit Dynamic RAM
HYB3164165AT High-Speed Fully-Differential Amplifiers 8-MSOP 0 to 70
HYB3164165BT High-Speed Fully-Differential Amplifiers 8-MSOP 0 to 70
HYB3165165ATL-50 4M x 16-Bit Dynamic RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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HYB3164165T-60 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:4M x 16-Bit Dynamic RAM
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