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參數資料
| 型號： | HYB25D256160BC-6 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | Tools, Crimp; For Use With:Crimp terminal 12-60 AWG; Crimp Tool:Hand Crimp Tool |
| 中文描述： | 256兆雙倍數據速率SDRAM |
| 文件頁數： | 5/94頁 |
| 文件大小： | 3326K |
| 代理商： | HYB25D256160BC-6 |
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Data Sheet
13
Rev. 1.6, 2004-12
HYB25D256[16/40/80]0C[E/C/F/T](L)
256 Mbit Double-Data-Rate SDRAM
Pin Configuration
K7, 29
A0
I
SSTL
Address Bus 11:0
Note: Provide the row address for Active commands, and the
column address and Auto Precharge bit for Read/Write
commands, to select one location out of the memory array
in the respective bank. A10 is sampled during a Precharge
command to determine whether the Precharge applies to
one bank (A10 LOW) or all banks (A10 HIGH). If only one
bank is to be precharged, the bank is selected by BA0, BA1.
The address inputs also provide the op-code during a Mode
Register Set command.
L8, 30
A1
I
SSTL
L7, 31
A2
I
SSTL
M8, 32
A3
I
SSTL
M2, 35
A4
I
SSTL
L3, 36
A5
I
SSTL
L2, 37
A6
I
SSTL
K3, 38
A7
I
SSTL
K2, 39
A8
I
SSTL
J3, 40
A9
I
SSTL
K8, 28
A10
I
SSTL
AP
I
SSTL
J2, 41
A11
I
SSTL
H2, 42
A12
I
SSTL
Address Signal 12
Note: 256 Mbit or larger dies
NC
—
Note: 128 Mbit or smaller dies
F9, 17
A13
I
SSTL
Address Signal 13
Note: 1 Gbit based dies
NC
—
Note: 512 Mbit or smaller dies
Data Signals
×4 organization
B7, 5
DQ0
I/O
SSTL
Data Signal 3:0
D7, 11
DQ1
I/O
SSTL
D3, 56
DQ2
I/O
SSTL
B3, 62
DQ3
I/O
SSTL
Data Strobe
×4 organisation
E3, 51
DQS
I/O
SSTL
Data Strobe
Note: Output with read data, input with write data. Edge-aligned
with read data, centered in write data. Used to capture write
data.
Data Mask
×4 organization
F3, 47
DM
I
SSTL
Data Mask:
Note: DM is an input mask signal for write data. Input data is
masked when DM is sampled HIGH coincident with that
input data during a Write access. DM is sampled on both
edges of DQS. Although DM pins are input only, the DM
loading matches the DQ and DQS loading.
Table 4
Pin Configuration of DDR SDRAM
Ball#/Pin#
Name
Pin
Type
Buffer
Type
Function
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| HYB39S256800DC-6 | 256 MBit Synchronous DRAM |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| HYB25D256160BC-7 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:256-Mbit Double Data Rate SDRAM, Die Rev. B |
| HYB25D256160BC-7F | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:256-Mbit Double Data Rate SDRAM, Die Rev. B |
| HYB25D256160BC-8 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:256-Mbit Double Data Rate SDRAM, Die Rev. B |
| HYB25D256160BCL-6 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:256 Mbit Double Data Rate SDRAM |
| HYB25D256160BCL-7 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:256 Mbit Double Data Rate SDRAM |
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