參數(shù)資料
型號: HYB25D128800ATL-6
廠商: INFINEON TECHNOLOGIES AG
英文描述: 128 Mbit Double Data Rate SDRAM
中文描述: 128兆雙倍數(shù)據(jù)速率SDRAM
文件頁數(shù): 33/85頁
文件大小: 3085K
代理商: HYB25D128800ATL-6
CL=2.5
Data Sheet
33
Rev. 1.0, 2004-04
HYB25D128[400/800/160]C[C/E/T](L)
128 Mbit Double Data Rate SDRAM
Functional Description
Figure 13
Random Read Accesses: CAS Latencies (Burst Length = 2, 4 or 8)
DOa-n
CAS Latency = 2
Read
Read
Read
NOP
NOP
Read
DOa-b
DOa-n’
DOa-x
DOa-x’
DOa-b’
DOa-g
CK
CK
Command
Address
DQS
DQ
DO a-n, etc. = data out from bank a, column n etc.
n' etc. = odd or even complement of n, etc. (i.e., column address LSB inverted).
Reads are to active rows in any banks.
Shown with nominal t
AC
, t
DQSCK
, and t
DQSQ
.
Don’t Care
BAa, COL n
BAa, COL x
BAa, COL b
BAa, COL g
CL=2
CAS Latency = 2.5
Read
Read
Read
NOP
NOP
Read
CK
CK
Command
Address
DQS
DQ
BAa, COL n
BAa, COL x
BAa, COL b
BAa, COL g
DOa-n
DOa-b
DOa-n’
DOa-x
DOa-x’
DOa-b’
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