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| 型號： | HYB18L256160BC-7.5 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | BJAWBMSpecialty DRAMs Mobile-RAM |
| 中文描述： | BJAWBMSpecialty DRAM的移動RAM |
| 文件頁數(shù)： | 32/49頁 |
| 文件大?。?/td> | 1327K |
| 代理商： | HYB18L256160BC-7.5 |
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HY[B/E]18L256160B[C/F]-7.5
256-Mbit Mobile-RAM
Functional Description
Data Sheet
32
V1.4, 2004-04-30
2.4.6.3
DQM may be used to mask write data: when asserted HIGH, input data will be masked and no write will be
performed. The generic timing parameters as listed in
Table 11
also apply to this DQM operation. The write burst
in progress is not affected and will continue as programmed.
WRITE - DQM Operation
Figure 32
WRITE Burst - DQM Operation
2.4.6.4
A WRITE burst may be followed by, or truncated with a READ command. The READ command can be performed
to the same or a different (active) bank. With the registration of the READ command, data inputs will be ignored
and no WRITE will be performed, as shown in
Figure 33
.
WRITE to READ
Figure 33
WRITE to READ Timing
Ba A, Col n = Bank A, Column n
DI n = Data In to column n
Burst Length = 4 in the case shown.
3 subsequent elements of Data In are provided in the programmed order following
DI n, with the first element (DI n+1) being masked.
DQM write latency is 0 clock cycles.
= Don't Care
CLK
Command
NOP
NOP
NOP
NOP
NOP
WRITE
Address
Ba A,
Col n
DQM
DQ
DI n
DI n+2
DI n+3
Ba A, Col n (b) = bank A, column n (b)
DI n = Data In to column n; DO b = Data Out from column b;
Burst Length = 4 in the case shown.
3 subsequent elements of Data In (Out) are provided in the programmed order following DI n (DO b).
DI n+3 is ignored due to READ command. No DQM masking required at this point.
= Don't Care
CLK
Write data
are ignored
CL=2
CL=3
Command
NOP
READ
NOP
NOP
NOP
NOP
NOP
WRITE
Address
Ba A,
Col b
Ba A,
Col n
DQ
DO b
DO b+1
DO b+2
DI n
DI n+1
DI n+2
High-Z
DQ
DO b
DI b+1
DI n
DI n+1
DI n+2
High-Z
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYB18L256160BF-7.5 | RT ANG PCB CONT .40/1.295 BULK |
| HYB18RL25632AC-4 | MEMORY SPECTRUM |
| HYC3N2560NO50AA1AA | CAP 560PF 100V 10% X7R AXIAL TR-14 |
| HYB18S128160TE-3 | 122 x 32 pixel format, LED Backlight available |
| HYB25S128160TE-3 | 122 x 32 pixel format, LED Backlight available |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYB18L256160BCL-7.5 | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:DRAMs for Mobile Applications 256-Mbit Mobile-RAM |
| HYB18L256160BCX-7.5 | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:DRAMs for Mobile Applications 256-Mbit Mobile-RAM |
| HYB18L256160BF | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:DRAMs for Mobile Applications |
| HYB18L256160BF-7.5 | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:DRAMs for Mobile Applications 256-Mbit Mobile-RAM |
| HYB18L256160BF-75 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:DRAMs for Mobile Applications |
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