參數(shù)資料
型號(hào): HY57V56820HT-K
英文描述: x8 SDRAM
中文描述: x8 SDRAM內(nèi)存
文件頁(yè)數(shù): 6/13頁(yè)
文件大小: 61K
代理商: HY57V56820HT-K
HY57V281620A
Rev. 1.3/Aug. 01
7
DC CHARACTERISTICS II
(TA=0 to 70
°
C
, V
DD
=3.3
±
0.3V, V
SS
=0V)
Note :
1.I
DD1
and I
DD4
depend on output loading and cycle rates. Specified values are measured with the output open
2.Min. of tRRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS II
3.HY57V281620AT-6/7/K/H/8/P/S
4.HY57V281620ALT-6/7/K/H/8/P/S
Parameter
Symbol
Test Condition
Speed
Unit
Note
-6
-7
-K
-H
-8
-P
-S
Operating Current
I
DD1
Burst length=1, One bank active
t
RC
t
RC
(min), I
OL
=0mA
120
120
110
110
100
100
100
mA
1
Precharge Standby Current
in Power Down Mode
I
DD2P
CKE
V
IL
(max), t
CK
= 15ns
2
mA
I
DD2PS
CKE
V
IL
(max), t
CK
=
2
Precharge Standby Current
in Non Power Down Mode
I
DD2N
CKE
V
IH
(min), CS
V
IH
(min), t
CK
= 15ns
Input signals are changed one time during
2clks. All other pins
V
DD
-0.2V or
0.2V
20
mA
I
DD2NS
CKE
V
IH
(min), t
CK
=
Input signals are stable.
10
Active Standby Current
in Power Down Mode
I
DD3P
CKE
V
IL
(max), t
CK
= 15ns
7
mA
I
DD3PS
CKE
V
IL
(max), t
CK
=
7
Active Standby Current
in Non Power Down Mode
I
DD3N
CKE
V
IH
(min), CS
V
IH
(min), t
CK
= 15ns
Input signals are changed one time during
2clks. All other pins
V
DD
-0.2V or
0.2V
40
mA
I
DD3NS
CKE
V
IH
(min), t
CK
=
Input signals are stable.
40
Burst Mode Operating
Current
I
DD4
t
CK
t
CK
(min), I
OL
=0mA
All banks active
CL=3
140
130
120
120
110
100
100
mA
1
CL=2
100
100
120
100
100
100
100
Auto Refresh Current
I
DD5
t
RRC
t
RRC
(min), All banks active
240
240
240
220
200
200
200
mA
2
Self Refresh Current
I
DD6
CKE
0.2V
2
mA
3
800
uA
4
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