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HY57V28820HC(L)T-I
Rev. 0.1/Jan. 01
10
COMMAND TRUTH TABLE
Note :
1. OP Code : Operand Code
2. V = Valid, X = Dont care, H = Logic High, L= Logic Low, RA = Row Address, CA = Column Address.
3. The burst read sigle write mode is entered by programming the write burst mode bit (A9) in the mode register to a logic 1.
Command
CKEn-1
CKEn
CS
RAS
CAS
WE
DQM
ADDR
A10/
AP
BA
Note
Mode Register Set
H
X
L
L
L
L
X
OP code
1
No Operation
H
X
H
X
X
X
X
X
L
H
H
H
Bank Active
H
X
L
L
H
H
X
RA
V
Read
H
X
L
H
L
H
X
CA
L
V
Read with Autoprecharge
H
Write
H
X
L
H
L
L
X
CA
L
V
Write with Autoprecharge
H
Precharge All Banks
H
X
L
L
H
L
X
X
H
X
Precharge selected Bank
L
V
Burst Stop
H
X
L
H
H
L
X
X
DQM
H
X
V
X
Auto Refresh
H
H
L
L
L
H
X
X
Burst-Read-Single-
WRITE
H
X
L
L
L
L
X
A9 Pin High
(Other Pins OP code)
MRS
Mode
Self Refresh
Entry
H
L
L
L
L
H
X
X
Exit
L
H
H
X
X
X
X
L
H
H
H
Precharge
power down
Entry
H
L
H
X
X
X
X
X
L
H
H
H
Exit
L
H
H
X
X
X
X
L
H
H
H
Clock
Suspend
Entry
H
L
H
X
X
X
X
X
L
V
V
V
Exit
L
H
X
X
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HY57V561620B | 4 Banks x 4M x 16Bit Synchronous DRAM |
| HY57V561620BLT-6I | 4 Banks x 4M x 16Bit Synchronous DRAM |
| HY57V561620BLT-8I | 4 Banks x 4M x 16Bit Synchronous DRAM |
| HY57V561620BLT-HI | 4 Banks x 4M x 16Bit Synchronous DRAM |
| HY57V561620BLT-KI | 4 Banks x 4M x 16Bit Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY57V561620 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x 4M x 16Bit Synchronous DRAM |
| HY57V561620ALT-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SDRAM |
| HY57V561620ALT-6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SDRAM |
| HY57V561620ALT-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SDRAM |
| HY57V561620ALT-H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SDRAM |
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