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參數(shù)資料
| 型號： | HY51V18163HGT-6 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 1M x 16Bit EDO DRAM |
| 中文描述： | 1M X 16 EDO DRAM, 60 ns, PDSO44 |
| 封裝： | 0.400 INCH, PLASTIC, TSOP2-50/44 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 107K |
| 代理商： | HY51V18163HGT-6 |
HY51V(S)18163HG/HGL
Rev.0.1/Apr.01
7
- continued -
Read Cycle
Parameter
Symbol
-50
-60
-70
Unit
Note
Min
Max
Min
Max
Min
Max
/OE to Din delay time
t
OED
13
-
15
-
18
-
ns
5
/OE delay time from Din
t
DZO
0
-
0
-
0
-
ns
6
/CAS delay time from Din
tDZC
0
-
0
-
0
-
ns
6
Transition time ( Rise and Fall)
t
T
2
50
2
50
2
50
ns
7
Refresh period
t
REF
-
16
-
16
-
16
ms
1K Ref.
Refresh period (L-version)
-
128
-
128
-
128
ms
1K Ref.
Parameter
Symbol
-50
-60
-70
Unit
Note
Min
Max
Min
Max
Min
Max
Access time from /RAS
t
RAC
-
50
-
60
-
70
ns
8,9
Access time from /CAS
t
CAC
-
13
-
15
-
18
ns
9,10,
17
Access time from column address
tAA
-
25
-
30
-
35
ns
9,11,
17
Access time from /OE
t
OEA
-
13
-
15
-
18
ns
9
Read command set-up time
t
RCS
0
-
0
-
0
-
ns
21
Read command hold time to /CAS
tRCH
0
-
0
-
0
-
ns
12,22
Read command hold time to /RAS
t
RRH
5
-
5
-
5
-
ns
12
Column address to /RAS lead time
t
RAL
25
-
30
-
35
-
ns
Column address to /CAS lead time
tCAL
15
-
18
-
23
-
ns
/CAS to output in low-Z
tCLZ
0
-
0
-
0
-
ns
Output data hold time
t
OH
3
-
3
-
3
-
ns
27
Output data hold time from /OE
tOHO
3
-
3
-
3
-
ns
Output buffer turn off time
t
OFF
-
13
-
15
-
15
ns
13,27
Output buffer turn off time to /OE
t
OEZ
-
13
-
15
-
15
ns
13
/CAS to Din delay time
tCDD
13
-
15
-
18
-
ns
5
Read command hold time from /RAS
tRCHR
50
-
60
-
70
-
ns
Output data hold time from /RAS
t
OHR
3
-
3
-
3
-
ns
27
Output buffer turn-off time to /RAS
tOFR
-
13
-
15
-
15
ns
27
Output buffer turn off time to /WE
t
WEZ
-
13
-
15
-
15
ns
/WE to DIN delay time
t
WDD
13
-
15
-
18
-
ns
/RAS to DIN delay time
tRDD
13
-
15
-
18
-
ns
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