參數(shù)資料
型號(hào): HV9708X
廠商: SUPERTEX INC
元件分類: 顯示驅(qū)動(dòng)器
英文描述: 32-Channel Serial To Parallel Converter With High Voltage Push-Pull Outputs
中文描述: EL DISPLAY DRIVER, UUC41
封裝: DIE
文件頁(yè)數(shù): 1/5頁(yè)
文件大?。?/td> 449K
代理商: HV9708X
02/96/022
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
Device
44 J-Lead Quad
Plastic Chip Carrier
Die
in waffle pack
HV9708
HV9708PJ
HV9708X
HV9808
HV9808PJ
HV9808X
Ordering Information
32-Channel Serial To Parallel Converter
With High Voltage Push-Pull Outputs
Features
Processed with HVCMOS
technology
Output voltages up to 80V
Low power level shifting
Shift register speed 8MHz
Latched data outputs
Forward and reverse shifting options
Diode to V
PP
allows efficient power recovery
5V CMOS compatible inputs
HV9708
HV9808
General Description
The HV97 and HV98 are low-voltage serial to high-voltage paral-
lel converters with push-pull outputs. These devices have been
designed for use as drivers for AC-electroluminescent displays.
They can also be used in any application requiring multiple output
high-voltage current sourcing and sinking capabilities such as
driving plasma panels, vacuum fluorescent displays, or large
matrix LCD displays. The inputs are fully CMOS compatible.
These devices consist of a 32-bit shift register, 32 latches, and
control logic to perform the polarity select and blanking of the
outputs. HV
OUT
1 is connected to the first stage of the shift register
through the polarity and blanking logic. Data is shifted through the
shift register on the logic low to high transition of the clock. The
HV97 shifts data in the clockwise direction when viewed from the
top of the package and the HV98 shifts in the counterclockwise
direction. A data output buffer is provided for cascading devices.
This output reflects the current status of the last bit of the shift
register (HV
OUT
32). Operation of the shift register is not affected
by the LE (latch enable), BL (blanking), or the POL (polarity) in-
puts. Transfer of data from the shift register to the latch occurs
when the LE (latch enable) input is high. The data in the latch is
stored when LE is low.
Absolute Maximum Ratings
1
Supply voltage, V
DD2
Output voltage, V
PP2
Logic input levels
2
Ground current
3
Continuous total power dissipation
4
Operating temperature range
Storage temperature range
Lead temperature 1.6mm (1/16 inch)
from case for 10 seconds
-0.5V to +7V
V
DD
to +90V
-0.5V to V
DD
+0.5V
1.5A
1200mW
-40
°
C to +85
°
C
-65
°
C to +150
°
C
260
°
C
Notes:
1. Device will survive (but operation may not be specified or guaranteed) at
these extremes.
2. All voltages are referenced to GND.
3. Duty cycle is limited by the total power dissipated in the package.
4. For operation above 25
°
C ambient, derate linearly to 70
°
C at 12mW/
°
C.
Package Options
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