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參數(shù)資料
| 型號： | HV6810 |
| 廠商： | Supertex, Inc. |
| 英文描述： | 10-Channel Serial-Input Latched Display Driver |
| 中文描述： | 10通道串行輸入鎖存顯示驅動程序 |
| 文件頁數(shù)： | 2/5頁 |
| 文件大小： | 33K |
| 代理商： | HV6810 |
12-143
Symbol
Parameter
Min
Typ
Max
Units
Conditions
V
OH
High-level output voltage
Q outputs
57.5
58
V
I
OH
= 25mA
V
DD
= 4.5V, I
OH
= -100
μ
A
I
OH
= 100
μ
A, Blanking input at V
DD
V
DD
= 4.5V, I
OL
= 100
μ
A
T
A
= Max, V
OL
= 0.7V
V
O
= 0, Blanking input
T
A
= Max at V
DD
V
I
= V
DD
All inputs at 0V, one Q output high
Serial output
4
4.5
V
V
OL
Low-level output voltage
Q outputs
0.15
1
V
Serial output
0.05
0.1
V
I
OL
I
O(OFF)
Low-level Q output current (pull-down current)
60
80
μ
A
μ
A
Off-state output current
-1
-15
I
H
I
DD
High-level input current
1
μ
A
μ
A
μ
A
Supply current from V
DD
(standby)
10
50
10
50
All inputs at 0V, all Q outputs low
I
BB
Supply current from V
BB
0.05
0.1
mA
All outputs low, all Q outputs open
0.05
0.1
mA
All outputs high, all Q outputs open
*
All typical values are at T
A
= 25
°
C, except for I
O
.
HV6810
Electrical Characteristics
DC Characteristics
(V
DD
= 5V
±
10%, V
BB
= 60V, V
SS
= 0, T
A
= 25
°
C unless otherwise noted)
Symbol
Parameter
Min
Nom
Max
Units
V
DD
V
BB
V
SS
V
IH
V
IL
I
OH
f
CLK
T
A
Supply voltage
4.5
5.5
V
Supply voltage
20
80
V
Supply voltage
0
V
High-level input voltage (for V
DD
= 5V)
Low-level input voltage
3.5
5.3
V
-0.3
0.8
V
Continuous high-level Q output current
-25
mA
Clock frequency
5
MHz
Operating free-air temperature
Plastic
-40
+85
°
C
Note:
Power-up sequence should be the following:
1. Connect ground.
2. Apply V
.
3. Set all inputs (Data, CLK, Enable, etc.) to a known state.
4. Apply V
PP
.
Power-down sequence should be the reverse of the above.
Recommended Operating Conditions
AC Characteristics
(Timing requirements over recommended operating conditions)
Symbol
Parameter
Min
Typ
Max
Units
Conditions
t
W(CKH)
t
W(LEH)
t
SU(D)
t
H(D)
t
CKH-LEH
t
pd
*
*
Switching characteristics, V
BB
= 60V, T
A
= 25
°
C.
Pulse duration, clock high
100
ns
Pulse duration, latch enable high
100
ns
Setup time, data before clock
50
ns
Hold time, data after clock
50
ns
Delay time, clock to latch enable high
50
ns
Propagation delay time, latch enable to output
0.3
μ
s
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