Pin Assignment
Pin Description
Pin Name
I/O
ROM Code
Option
Description
RES
I
Schmitt trigger reset input, active low.
PA0~PA7
I/O
Wake-up*
Pull-high***
Bidirectional 8-bit input/output port. Each bit can be configured as a
wake-up input by a option. Software instructions determine the CMOS
outputorSchmitttriggerinputwith/withoutpull-highresistor.Thepull-high
resistor of each input/output line is also optional.
PB0/PFD
PB1~PB7
I/O
Pull-high**
PB0 or PFD
Bidirectional 8-bit input/output port. Software instructions determine
the CMOS output or Schmitt trigger input with/without pull-high resis-
tor. The pull-high resistor of each input/output line is also optional. The
output mode of PB0 can be used as an internal PFD signal output and
it can be used as a various frequency carrier signal.
VSS
Negative power supply, ground
PC0/TMR0
PC1~PC4
PC5/TMR1
I/O
Pull-high*
Bidirectional 6-bit input/output port. Software instructions determine
the CMOS output or Schmitt trigger input with/without pull-high resis-
tor.Thepull-highresistorofeachinput/outputlineisalsooptional.PC0
and PC5 are pin shared with TMR0 and TMR1 function pins.
PF0/INT
I/O
Pull-high*
Bidirectional 1-bit input/output port. Software instructions determine
the CMOS output or Schmitt trigger input with/without pull-high resis-
tor. The pull-high resistor of this input/output line is also optional. PF0
is pin shared with the INT function pin.
VDD
Positive power supply
OSC1
OSC2
I
O
Crystal
or RC
OSC1, OSC2 are connected to an RC network or Crystal (determined
by option) for the internal system clock. In the case of RC operation,
OSC2 is the output terminal for 1/4 system clock.
Note:
*:
Bit option
**: Nibble option
***: Byte option
HT48RA3
Rev. 1.20
2
May 12, 2003
2
/
3
0
1
4
5
2
/
3
0
4
1
0
3
/
2
5
4
1
- 3
- /
$ 1
$ 0
$ 3
$ /
0
1
4
- 0
- 1
$ 4
$
$
$
- 4
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