參數(shù)資料
型號(hào): HT48R05A-1
廠商: Holtek Semiconductor Inc.
英文描述: 8-Bit High Performance RISC-like OTP Microcontroller(8位、高性能、類似RISC、一次可編程微控制器,用于多I/O接口設(shè)備)
中文描述: 8位高性能RISC樣檢察官辦公室的微控制器(8位,高性能,類似的RISC,一次可編程微控制器,用于多的I / O接口設(shè)備)
文件頁(yè)數(shù): 9/44頁(yè)
文件大?。?/td> 290K
代理商: HT48R05A-1
HT48R05A-1
9
November 29, 2000
All of the data memory areas can handle arith-
metic, logic, increment, decrement and rotate
operations directly. Except for some dedicated
bits, each bit in the data memory can be set and
reset by "SET [m].i" and "CLR [m].i". They are
also indirectly accessible through memory
pointer register (MP;01H).
Indirect addressing register
Location 00H is an indirect addressing register
that is not physically implemented. Any
read/writeoperationof[00H]accessesdatamem-
orypointedtobyMP(01H).Readinglocation00H
itself indirectly will return the result 00H. Writ-
ing indirectly results in no operation.
The memory pointer register MP (01H) is a 7-bit
register. The bit 7 of MP is undefined and reading
will return the result 1 . Any writing operation
to MP will only transfer the lower 7-bit data to
MP.
Accumulator
The accumulator is closely related to ALU oper-
ations. It is also mapped to location 05H of the
data memory and can carry out immediate data
operations. The data movement between two
data memory locations must pass through the
accumulator.
Arithmetic and logic unit
ALU
This circuit performs 8-bit arithmetic and logic
operations. The ALU provides the following func-
tions:
Arithmetic operations (ADD, ADC, SUB,
SBC, DAA)
Logic operations (AND, OR, XOR, CPL)
Rotation (RL, RR, RLC, RRC)
Increment and Decrement (INC, DEC)
Branch decision (SZ, SNZ, SIZ, SDZ ....)
The ALU not only saves the results of a data op-
eration but also changes the status register.
Status register
STATUS
This 8-bit register (0AH) contains the zero flag
(Z), carry flag (C), auxiliary carry flag (AC),
overflow flag (OV), power down flag (PD), and
watchdog time-out flag (TO). It also records the
status information and controls the operation
sequence.
With the exception of the TO and PD flags,
bits in the status register can be altered by
instructions like most other registers. Any
data written into the status register will not
change the TO or PD flag. In addition opera-
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RAM mapping
相關(guān)PDF資料
PDF描述
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