參數(shù)資料
型號(hào)： HT48C50
廠商： Holtek Semiconductor Inc.
英文描述： 8-Bit Microcontroller Series
中文描述： 8位微控制器系列
文件頁(yè)數(shù)： 19/59頁(yè)
文件大?。?/td> 2625K
代理商： HT48C50
R egister
Bit No.
L abel
F unction
INTC
(0BH)
0
E MI
Control the master (global) interrupt
(1= enabled; 0= disabled)
1
E E I
Control the external interrupt
(1= enabled; 0= disabled)
2
E T0I
Control the timer/event counter 0 interrupt
(1= enabled; 0= disabled)
3
E T1I
Control the timer/event counter 1 interrupt (for the
HT48C50/HT48C70 only) (1= enabled; 0= disabled)
4
E IF
E xternal interrupt request flag
(1= active; 0= inactive)
5
T0F
Internal timer/event counter 0 request flag
(1= active; 0= inactive)
6
T1F
Internal timer/event counter 1 request flag (for the
HT48C50/HT48C70 only) (1= active; 0= inactive)
7
—
Unused bit, read as “0”
INTC register
event counter interrupt request flag (TF; bit 5 of
INTC), that is caused by a timer overflow. When
the interrupt is enabled, and the stack is not
full, and the TF bit is set, a subroutine call to
location 08H will occur. The related interrupt
request flag (TF) will be reset and the E MI bit
will be cleared to disable further interrupts.
T he internal timer/event counter of the
HT48C50/HT48C70, is composed of two inter-
rupts, namely internal timer/event counter 0
interrupt and timer/event counter 1 interrupt.
The internal timer/event counter 0 interrupt is
initialized by setting the timer/event counter 0
interrupt request flag (T0F; bit 5 of INTC)
which is caused by a timer/event counter 0 over-
flow. After the interrupt is enabled, the stack is
not full, and the T0F bit is set, a subroutine call
to location 08H will occur. The related interrupt
request flag (T0F) will be reset and the E MI bit
be cleared to disable further interrupts. On the
other hand, the timer/event counter 1 interrupt
is operated in the same manner as the timer/
event counter 0. The related interrupt control
bits E T1I and T1F of the timer/event counter 1
are bit 3 and bit 6 of the INTC, respectively.
During the execution of an interrupt subroutine
of the four microcontrollers, other interrupt ac-
knowledgments are all held until the RE TI in-
struction is executed or the EMI bit and the
related interrupt control bit are both set to 1
(when the stack is not full). To return from the
interrupt subroutine, the RE T or RE TI instruc-
tion may be invoked. The RE TI will set the EMI
bit in order to enable an interrupt service
whereas the RE T will not.
Interrupts that occur in an interval between the
rising edges of two consecutive T2 pulses are
serviced on the latter of the two T2 pulses if the
corresponding interrupts are enabled. In case of
simultaneous requests, the following table
shows the priority that is applied. These can be
masked by resetting the E MI bit.
No.
Interrupt Source
Priority Vector
a
E xternal interrupt
1
04H
b
Timer/event
counter 0 overflow
2
08H
*c
Timer/event
counter 1 overflow
3
0CH
* Note: c applies only to the HT48C50/ HT48C70
HT48CXX/HT48RXX
19
25th May ’99
相關(guān)PDF資料
PDF描述
HT48CXX 8-Bit Microcontroller Series
HTREF-05 Voltage Reference
HTRM440_FAMILY HITAG proximity reader module hardware
HTRM800_FAMILY HITAG long range reader module hardware
HTRM800 HITAG long range reader module hardware
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HT48C50- 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:8-Bit Microcontroller
HT48C50(28SKDIP-H) 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
HT48C50(40DIP-A) 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
HT48C50-1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit I/O Type Mask MCU
HT48C50-1_09 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O Type 8-Bit MCU
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