參數(shù)資料
型號: HT46R47(18DIP-A)
英文描述: Analog IC
中文描述: 模擬IC
文件頁數(shù): 42/45頁
文件大?。?/td> 297K
代理商: HT46R47(18DIP-A)
SWAP [m]
Swap nibbles within the data memory.
Description
The low-order and high-order nibbles of the specified data memory (one of
the data memories) are interchanged.
Operation
[m].3~[m].0
[m].7~[m].4
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
SWAPA [m]
Swap data memory and place result in the accumulator.
Description
The low-order and high-order nibbles of the specified data memory are inter-
changed, writing the result to the accumulator. The contents of the data
memory remain unchanged.
Operation
ACC.3~ACC.0
ACC.7~ACC.4
[m].7~[m].4
[m].3~[m].0
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
SZ [m]
Skip if data memory is 0.
Description
If the contents of the specified data memory are 0, the following instruction,
fetched during the current instruction execution, is discarded and a dummy
cycle is replaced to get the proper instruction (2 cycles). Otherwise proceed
with the next instruction (1 cycle).
Operation
Skip if [m]=0
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
SZA [m]
Move data memory to ACC, skip if 0.
Description
The contents of the specified data memory are copied to the accumulator. If
the contents is 0, the following instruction, fetched during the current in-
struction execution, is discarded and a dummy cycle is replaced to get the
proper instruction (2 cycles). Otherwise proceed with the next instruction (1
cycle).
Operation
Skip if [m]=0, ACC
[m]
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
HT46R47
Rev. 1.40
42
July 18, 2001
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