參數(shù)資料
型號: HT24LC02(8SOP)
元件分類: EEPROM
英文描述: EEPROM
中文描述: EEPROM的
文件頁數(shù): 6/12頁
文件大?。?/td> 100K
代理商: HT24LC02(8SOP)
Timing Diagrams
Note:
The write cycle time t
WR
is the time from a valid stop condition of a write sequence to the end of the valid start
condition of sequential command.
HT24LC02
Rev. 1.10
6
November 5, 2002
allyclockedout.Themicrocontrollerdoesnotrespond
with an input zero but generates a following stop con-
dition (refer to Current read timing).
Random read
Arandomreadrequiresadummybytewritesequence
to load in the data word address which is then clocked
in and acknowledged by the EEPROM. The
microcontroller must then generate another start con-
dition. The microcontroller now initiates a current ad-
dress read by sending a device address with the
read/write select bit high. The EEPROM acknowl-
edges the device address and serially clocks out the
data word. The microcontroller does not respond with
a zero but does generates a following stop condition
(refer to Random read timing).
Sequential read
Sequential reads are initiated by either a current ad-
dress read or a random address read. After the
microcontrollerreceivesadataword,itrespondswithan
acknowledgment. As long as the EEPROM receives an
acknowledgment, it will continue to increment the data
word address and serially clock out sequential data
words. When the memory address limit is reached, the
data word address will roll over and the sequential read
continues. The sequential read operation is terminated
when the microcontroller does not respond with a zero
but generates a following stop condition.
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