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參數(shù)資料
| 型號： | HT24LC02(8DIP) |
| 元件分類： | EEPROM |
| 英文描述： | EEPROM |
| 中文描述： | EEPROM的 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大小： | 100K |
| 代理商： | HT24LC02(8DIP) |
HT24LC02
Rev. 1.10
5
November 5, 2002
Page write
The 2K EEPROM is capable of an 8-byte page write.
A page write is initiated the same as byte write, but the
microcontroller does not send a stop condition after
the first data word is clocked in. Instead, after the
EEPROM acknowledges the receipt of the first data
word, the microcontroller can transmit up to seven
more data words. The EEPROM will respond with a
zero after each data word received. The
microcontroller must terminate the page write se-
quence with a stop condition.
The data word address lower three (2K) bits are inter-
nally incremented following the receipt of each data
word. The higher data word address bits are not incre-
mented, retaining the memory page row location (re-
fer to Page write timing).
Acknowledge polling
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the stop condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master
sending a start condition followed by the control byte
for a write command (R/W=0). If the device is still busy
with the write cycle, then no ACK will be returned. If
the cycle is completed, then the device will return the
ACK and the master can then proceed with the next
read or write command.
Write protect
The HT24LC02 can be used as a serial ROM when
the WP pin is connected to VCC. Programming will be
inhibited
and
the
entire
write-protected.
memory
will
be
Read operations
Read operations are initiated the same way as write
operations with the exception that the read/write se-
lect bit in the device address word is set to one. There
are three read operations: current address read, ran-
dom address read and sequential read.
Current address read
The internal data word address counter maintains the
last address accessed during the last read or write op-
eration, incremented by one. This address stays valid
betweenoperationsaslongasthechippowerismain-
tained. The address roll over during read from the last
byteofthelastmemorypagetothefirstbyteofthefirst
page. The address roll over during write from the last
byte of the current page to the first byte of the same
page. Once the device address with the read/write se-
lect bit set to one is clocked in and acknowledged by
the EEPROM, the current address data word is seri-
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Acknowledge polling flow
相關PDF資料 |
PDF描述 |
|---|---|
| HT24LC02(8SOP) | EEPROM |
| HT24LC02(8TSSOP) | EEPROM |
| HT24LC04(8DIP) | EEPROM |
| HT24LC04(8SOP) | EEPROM |
| HT24LC04-8DIP-A | EEPROM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HT24LC02-8SOPLF | 制造商:Holtek Semiconductor Inc 功能描述:EEPROM 2K 2 WIRE SERIAL SOP8 |
| HT24LC02A | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:CMOS 2K 2-Wire Serial EEPROM |
| HT24LC04 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:CMOS 4K 2-Wire Serial EEPROM |
| HT24LC04(8DIP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
| HT24LC04(8SOP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
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