參數(shù)資料
型號(hào)： HSP48908883
廠商： Intersil Corporation
英文描述： Two Dimensional Convolver
中文描述： 二維卷積器
文件頁(yè)數(shù)： 12/18頁(yè)
文件大小： 110K
代理商： HSP48908883
12
A operation: output of ALU = A input (DIN0-7) output
rounding and unsigned input data format
The convolver can be reset at any time, but must be reset
before updating the Row Length Register in order to provide
proper operation. After RESET returns high, the user has
1024 cycles of CLK to load the Row Length Register. After
1024 OLK cycles, the Row Length Register is automatically
set to 0 (row length = 1024) and further writes to this register
are ignored.
FRAME
This FRAME input initializes all internal flip flops and
registers except for the coefficient, ALU, ALU microcode,
Row Length, and Initialization Registers. It is used to reset
the convolver between video frames and eliminates the need
to reinitialize the entire convolver or reload the coefficients.
FRAME is an asynchronous input and may occur at any
time. However, it must be deasserted at least TFS ns prior to
the rising clock edge that is to begin operation for the next
frame. While FRAME is asserted, the registers and flip- flops
will remain in the reset state.
Operation
The HSP48908 has three basic modes of operation: single
chip mode, operation with external row buffers and multiple
devices cascaded together for larger convolution kernels
and/or longer row lengths. The mode of operation is defined
by the contents of the Initialization Register, and can be
modified at any time by a microprocessor or other external
means.
Single Chip Mode
A single HSP48908 can be used to perform 3 x 3 convolution
on 8-bit image data with row lengths up to 1024. A block
diagram of this configuration is shown in Figure 3. In this
mode of operation, the image data is input into the DlN0-7
bus in a raster scan order starting with the upper left pixel. To
perform the convolution operation, a group of nine image
pixels is multiplied by the 3 x 3 array of filter coefficients and
their products are summed and sent to the output. For the
example in Figure 3, the pixel value in the output image at
location (m, n) is given by:
POUT(m,n) (A x Pm-1, n-1)
+ (B x Pm-1, n) + (C x Pm-1, n+1)
+ (D x Pm, n-1) + (E x Pm, n)
+ (F x Pm, n+1)
+ (G x Pm+1, n-1) + (H x Pm+1, n)+ (I x Pm+1, n+1)
This process is continually repeated until the last pixel of the
last row of the image has been input. It can then start again
with the first row of the next frame. The FRAME pin is used
to clear the row buffers, multiplier input latches and
DOUTO19 registers between frames.
The setup for single chip operation is straightforward. After
reset, the convolver is configured for row lengths of 1024
pixels, no input data delay, no ALU pixel point operations, no
output rounding, and an unsigned input format. The user can
change this default setup by loading new values into the ALU
microcode, initialization and Row Length Registers. RESET
also clears the Coefficient Registers and CREG0 is selected
for internal processing. The user can now load the
coefficients one at a time from A to I, via the ClN0-7 inputs
and the LD and CS control lines.
Multiple filter kernels can also be used on the same image
data using the dual Coefficient Registers CREG0 and
CREG1. This type of filtering is used when the
characteristics of the input pixel data change over the image
in such a way that no single filter produces satisfactory
results for the entire image. In order to filter such an image,
the characteristics of the filter itself must change while the
image is being processed. The HSP48908 can perform this
function with the use of an external processor. The
processor is used to calculate the required new filter
coefficients, loads them into the Coefficient Register not in
use, and selects the newly loaded Coefficient Register at the
proper time. The first Coefficient Register can then be
loaded with new coefficients in preparation for the next
change. This can be carried out with no interruption in
processing, provided that the new register is selected
synchronous to the convolver CLK signal.
The HSP48908 can also operate as a one dimensional 9 tap
FIR filter by programming the Row Buffer Length Register
with a value of 3 and setting the Initialization Register bit-0 to
a “0”. This configuration will provide for nine sequential input
values in the input to be multiplied by the coefficient values
in the selected Coefficient Register and provide the proper
filtered output. The equation for the output then becomes:
D
OUTn
=
A x Dn
-8
+ B x Dn
-7
+ C x D
n-6
+ D x D
n-5
+ E x D
n-4
+ F x D
n-3
+ G x D
n-2
+ H x D
n-1
+ I x D
n
Use Of External Row Buffers
External row buffers may be used when frames with row
sizes larger than 1024 pixels are desired. To use the
HSP48908 in this mode, the cascade mode control bit (bit 0)
of the Initialization Register is set to ‘1’ to allow the data on
FILTER KERNEL
IMAGE DATA
A B C
Pm-1, n -1
Pm-1, n
Pm-1, n + 1
D E F
PM, n -1
Pm, n
Pm, n + 1
G H I
Pm + 1, n -1
Pm + 1, n
Pm + 1, n + 1
FIGURE 3. 3 x 3 KERNEL ON AN 8-BIT, 1024 x N IMAGE
HSP48908
IMAGE
DATA
CLK
8
INITIALIZATION
DATA
20
FILTERED
IMAGE
HSP48908
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