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參數(shù)資料
| 型號(hào)： | HSP45240GM-25883 |
| 廠商： | Intersil Corporation |
| 英文描述： | Address Sequencer |
| 中文描述： | 地址序列 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 141K |
| 代理商： | HSP45240GM-25883 |
9-18
TABLE 2. AC ELECTRICAL SPECIFICATIONS
Device Guaranteed and 100% Tested
PARAMETER
SYMBOL
GROUP A
SUBGROUP
TEMPERATURE
(
o
C)
-25 (25MHz)
-33 (33MHz)
-40 (40MHz)
UNITS
MIN
MAX
MIN
MAX
MIN
MAX
Clock Period
t
CP
9, 10, 11
-55
≤
T
A
≤
125
39
-
30
-
25
-
ns
Clock Pulse Width High
t
CH
9, 10, 11
-55
≤
T
A
≤
125
15
-
12
-
10
-
ns
Clock Pulse Width Low
t
CL
9, 10, 11
-55
≤
T
A
≤
125
15
-
12
-
10
-
ns
Setup Time D0-6 to WR
High
t
DS
9, 10, 11
-55
≤
T
A
≤
125
17
-
16
-
14
-
ns
Hold Time D0-6 fromWR
Low
t
DH
9, 10, 11
-55
≤
T
A
≤
125
0
-
0
-
0
-
ns
Setup Time A, CS to WR
Low
t
AS
9, 10, 11
-55
≤
T
A
≤
125
5
-
5
-
5
-
ns
Hold Time A, CS from
WR High
t
AH
9, 10, 11
-55
≤
T
A
≤
125
0
-
0
-
0
-
ns
Pulse Width for WR Low
t
WRL
9, 10, 11
-55
≤
T
A
≤
125
18
-
14
-
12
-
ns
Pulse Width for WR High
t
WRH
9, 10, 11
-55
≤
T
A
≤
125
18
-
14
-
12
-
ns
WR Cycle Time
t
WP
9,10,11
-55
≤
T
A
≤
125
39
-
30
-
25
-
ns
Set-up Time STARTIN,
DLYBLK, to Clock High
t
IS
9, 10, 11
-55
≤
T
A
≤
125
15
-
12
-
10
-
ns
Hold Time STARTlN,
DLYBLK, to Clock High
t
lH
9, 10, 11
-55
≤
T
A
≤
125
0
-
0
-
0
-
ns
Clock to Output Prop.
Delay on OUT0-23
t
PDO
9, 10, 11
-55
≤
T
A
≤
125
-
18
-
16
-
14
ns
Clock to Prop. Delay, on
STARTOUT, BLKDONE,
DONE, ADVAL, and
BUSY
t
PDS
9, 10, 11
-55
≤
T
A
≤
125
-
18
-
16
-
14
ns
Output Enable Time
(Note 6)
t
EN
9, 10, 11
-55
≤
T
A
≤
125
-
22
-
20
-
15
ns
RST Low Time
t
RST
9, 10, 11
-55
≤
T
A
≤
125
2 Clock Cycles
ns
NOTES:
5. AC Testing: V
CC
= 4.5V and 5.5V, inputs are driven at 3.0V for Logic “1” and 0.0V for a Logic “0”. Input and output timing measurements
are made at 1.5V for both a logic “1” and “‘0”. CLK is driven at 4.0V and 0V and measured at 2.0V.
6. Transition is measured at
±
200mV from steady state voltage with loading as specified by test load circuit and C
L
= 40pF.
TABLE 3. ELECTRICAL PERFORMANCE SPECIFICATIONS
PARAMETERS
SYMBOL
TEST
CONDITIONS
NOTES
TEMPERATURE
-25
(25MHz)
-33
(33MHz)
-40 (40MHz)
UNITS
MIN
MAX
MIN
MAX
MIN
MAX
Input
Capacitance
C
IN
V
CC
= Open,
f = 1MHz, All mea-
surements are
referenced to de-
vice GND.
7
T
A
= 25
-
10
-
10
-
10
pF
Output
Capacitance
C
OUT
V
CC
= Open,
f = 1MHz, All mea-
surements are
referenced to de-
vice GND.
7
T
A
= 25
-
10
-
10
-
10
pF
Output Disable
t
OEZ
7, 8
-55
≤
T
A
≤
125
-
22
-
20
-
15
ns
HSP45240/883
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| HSP45240GM-33 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Address Sequencer |
| HSP45240GM-33/883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Address Sequencer |
| HSP45240GM-33883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Address Sequencer |
| HSP45240GM-40 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Address Sequencer |
| HSP45240GM-40/883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Address Sequencer |
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