參數(shù)資料
型號(hào)： HSP45116
廠商： Intersil Corporation
英文描述： Numerically Controlled Oscillator/Modulator
中文描述： 數(shù)控振蕩器/調(diào)制器
文件頁(yè)數(shù)： 11/18頁(yè)
文件大?。?/td> 129K
代理商： HSP45116
11
Complex Multiplier/Accumulator
The CMAC (Figure 2) performs two types of functions:
complex multiplication/accumulation for modulation and
demodulation of digital signals, and the operations
necessary to implement an FFT butterfly. Modulation and
demodulation are implemented using the complex multiplier
and its associated accumulator; the rest of the circuitry
in this section, i.e., the complex accumulator, input shifters
and growth detect logic are used along with the complex
multiplier/accumulator for FFTs. The complex multiplier
performs the complex vector multiplication on the output of
the Sine/Cosine Section and the vector represented by the
real and imaginary inputs RIN and IIN. The two vectors are
combined in the following manner:
ROUT = COS x RIN - SIN x IIN
IOUT = COS x IIN + SIN x RIN
RIN and IIN are latched into the input registers and passed
through the shift stages. Clocking of the input registers is
enabled with a low on ENI. The amount of shift on the
latched data is programmed with SH0-1 (Table 3). The
output of the shifters is sent to the CMAC and the auxiliary
accumulators.
The 33-bit real and imaginary outputs of the Complex
Multiplier are latched in the Multiplier Registers and then go
through the Accumulator Section of the CMAC. If the ACC
line is high, the feedback to the accumulators is enabled; a
low on ACC zeroes the feedback path, so that the next set of
real and imaginary data out of the complex multiplier is
stored in the CMAC Output Registers.
The data in the CMAC Output Registers goes to the
Multiplexer, the output of which is determined by the
OUTMUX0-1 lines (Table 4). BINFMT controls whether the
output of the Multiplexer is presented in two’s complement or
unsigned format; BINFMT = 0 inverts ROUT19 and IOUT19
for unsigned output, while BINFMT = 1 selects two’s
complement.
The Complex Accumulator duplicates the accumulator in the
CMAC. The input comes from the data shifters, and its 20-bit
complex output goes to the Multiplexer. ACC controls
whether the accumulator is enabled or not. OUTMUX0-1
determines whether the accumulator output appears on
ROUT and IOUT.
TABLE 3. INPUT SHIFT SELECTION
SH1
SH0
SELECTED BITS
0
0
RIN0-15, IMIN0-15
0
1
RIN1-16, IMIN1-16
1
0
RIN2-17, IMIN2-17
1
1
RIN3-18, IMIN3-18
TABLE 4. OUTPUT MULTIPLEXER SELECTION
OUT
MUX
1
OUT
MUX
0
RO16-19
RO0-15
IO16-19
IO0-15
0
0
Real CMAC
31-34
RealCMAC
15-30
ImagCMAC
31-34
ImagCMAC
15-30
0
1
Real CMAC
31-34
0, Real
CMAC 0-14
ImagCMAC
31-34
0, Imag
CMAC 0-14
1
0
Real ACC
16-19
Real ACC
0-15
Imag ACC
16-19
Imag ACC
0-15
1
1
Reserved
Reserved
Reserved
Reserved
HSP45116
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