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參數(shù)資料
| 型號： | HSP43168GC-45 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字信號處理外設(shè) |
| 英文描述： | Dual FIR Filter |
| 中文描述： | 10-BIT, DSP-DIGITAL FILTER, CPGA84 |
| 封裝： | CERAMIC, PGA-84 |
| 文件頁數(shù)： | 1/26頁 |
| 文件大?。?/td> | 325K |
| 代理商： | HSP43168GC-45 |
1
File Number
2808.8
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 407-727-9207
|
Copyright
Intersil Corporation 1999
HSP43168
Dual FIR Filter
The HSP43168 Dual FIR Filter consists of two independent
8-tap FIR filters. Each filter supports decimation from 1 to 16
and provides on-board storage for 32 sets of coefficients.
The Block Diagram shows two FIR cells each fed by a
separate coefficient bank and one of two separate inputs.
The outputs of the FIR cells are either summed or
multiplexed by the MUX/Adder. The compute power in the
FIR Cells can be configured to provide quadrature filtering,
complex filtering, 2-D convolution, 1-D/2-D correlations, and
interpolating/decimating filters.
The FIR cells take advantage of symmetry in FIR
coefficients by pre-adding data samples prior to
multiplication. This allows an 8-tap FIR to be implemented
using only 4 multipliers per filter cell. These cells can be
configured as either a single 16-tap FIR filter or dual 8-tap
FIR filters. Asymmetric filtering is also supported.
Decimationofupto16isprovidedtoboosttheeffectivenumber
of filter taps from 2 to 16 times. Further, the Decimation
Registers provide the delay necessary for fractional data
conversion and 2-D filtering with kernels to 16 x16.
The flexibility of the Dual is further enhanced by 32 sets of
user programmable coefficients. Coefficient selection may
be changed asynchronously from clock to clock. The ability
to toggle between coefficient sets further simplifies
applications such as polyphase or adaptive filtering.
The HSP43168 is a low power fully static design
implemented in an advanced CMOS process. The
configuration of the device is controlled through a standard
microprocessor interface.
Features
Two Independent 8-Tap FIR Filters Configurable as a
Single 16-Tap FIR
10-Bit Data and Coefficients
On-Board Storage for 32 Programmable Coefficient Sets
Up To: 256 FIR Taps, 16 x 16 2-D Kernels, or 10 x 19-Bit
Data and Coefficients
Programmable Decimation to 16
Programmable Rounding on Output
Standard Microprocessor Interface
Applications
Quadrature, Complex Filtering
Image Processing
Polyphase Filtering
Adaptive Filtering
Block Diagram
Ordering Information
PART NUMBER
HSP43168VC-33
HSP43168VC-40
HSP43168VC-45
HSP43168JC-33
HSP43168JC-40
HSP43168JC-45
HSP43168JI-40
HSP43168GC-45
TEMP.
RANGE (
o
C)
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
-40 to 85
0 to 70
PACKAGE
100 Ld MQFP
100 Ld MQFP
100 Ld MQFP
84 Ld PLCC
84 Ld PLCC
84 Ld PLCC
84 Ld PLCC
84 Ld CPGA
PKG. NO.
Q100.14x20
Q100.14x20
Q100.14x20
N84.1.15
N84.1.15
N84.1.15
N84.1.15
G84.A
FIR CELL A
COEFFICIENT
BANK A
CIN0 - 9
A0 - 8
WR
INA0 - 9
OUT9 - 27
CONTROL/
CONFIGURATION
MUX/
ADDER
10
9
19
INB0 - 9/
OUT0 - 8
OEH
OEL
CSEL0 - 4
MUX
MUX
FIR CELL B
COEFFICIENT
BANK B
10
10
9
Data Sheet
November 1999
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HSP43168VC-33 | Dual FIR Filter |
| HSP43168VC-40 | Dual FIR Filter |
| HSP43168VC-45 | Dual FIR Filter |
| HSP43168 | Dual FIR Filter |
| HSP43168883 | Dual FIR Filter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HSP43168GM-25/883 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP43168GM-33/883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual FIR Filter |
| HSP43168JC-33 | 功能描述:有源濾波器 DUAL DIGITAL FILTER 84 PLCC, 33MHZ, COMM RoHS:否 制造商:Maxim Integrated 通道數(shù)量:1 截止頻率:150 KHz 電源電壓-最大:11 V 電源電壓-最小:4.74 V 最大工作溫度:+ 85 C 安裝風格:Through Hole 封裝 / 箱體:PDIP N 封裝:Tube |
| HSP43168JC-33Z | 功能描述:有源濾波器 W/ANNEAL DL DIGTL FILTER 33MHZ COM RoHS:否 制造商:Maxim Integrated 通道數(shù)量:1 截止頻率:150 KHz 電源電壓-最大:11 V 電源電壓-最小:4.74 V 最大工作溫度:+ 85 C 安裝風格:Through Hole 封裝 / 箱體:PDIP N 封裝:Tube |
| HSP43168JC-40 | 制造商:Rochester Electronics LLC 功能描述:DUAL DIGITAL FILTER 84 PLCC, 40MHZ, COMM - Bulk |
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