
HS7541A
12-Bit CMOS Multiplying DAC
4
Copyright 2000 Sipex Corporation
PIN ASSIGNMENTS
18–Pin Plastic DIP and SOIC
Pin 1 — I
O1
— Inverted Current Output.
Pin 2 — I
O2
— Current Output.
Pin 3 — GND — Analog Ground.
Pin 4 — D
11
(MSB) — Data Bit 11 (Most Significant
Bit).
Pin 5 — D
10
— Data Bit 10.
Pin 6 — D
9
— Data Bit 9.
Pin 7 — D
8
— Data Bit 8.
Pin 8 — D
7
— Data Bit 7.
Pin 9 — D
6
— Data Bit 6.
Pin 10 — D
5
— Data Bit 5.
Pin 11 — D
4
— Data Bit 4.
Pin 12 — D
3
— Data Bit 3.
Pin 13 — D
2
— Data Bit 2.
Pin 14 — D
1
— Data Bit 1.
Pin 15 — D
0
(LSB) — Data Bit 0 (Least Significant
Bit).
Pin 16 — V
DD
— +5V to +15V Power Supply.
Pin17 — V
REF
— Voltage Reference Input.
Pin18 — R
FB
— Feedback Resistor.
20–Pin Plastic LCC
Pin 1 — I
O1
— Inverted Current Output.
Pin 2 — I
O2
— Current Output.
Pin 3 — GND — Analog Ground.
Pin 4 — N.C. — No Connection.
Pin 5 — D
(MSB) — Data Bit 11 (Most
Significant Bit).
Pin 6 — D
10
— Data Bit 10.
Pin 7 — D
9
— Data Bit 9.
Pin 8 — D
8
— Data Bit 8.
Pin 9 — D
7
— Data Bit 7.
Pin 10 — D
6
— Data Bit 6.
Pin 11 — D
5
— Data Bit 5.
Pin 12 — D
4
— Data Bit 4.
Pin 13 — D
3
— Data Bit 3.
Pin 14 — D
2
— Data Bit 2.
Pin 15 — D
1
— Data Bit 1.
Pin 16 — D
0
(LSB) — Data Bit 0 (Least Signifi-
cant Bit).
Pin 17 — N.C. — No Connection.
Pin 18 — V
DD
— +5V to +15V Power Supply.
Pin 19 — V
REF
— Voltage Reference Input.
Pin 20 — R
FB
— Feedback Resistor.
FEATURES…
The
HS7541A
is a low–cost, high stability mono-
lithic 12–bit CMOS 4–quadrant multiplying
DAC. It is constructed using a proprietary low–
TCR thin–film process that requires no laser–
trimming to achieve 12–bit performance. With
its inherent high stability and a segmented (de-
coded) DAC architecture, the
HS7541A
retains
its performance over time and temperature. To
further improve reliability, all digital inputs are
protected against 2KV ESD. Each DAC is fully
characterized by all–codes testing to eliminate
any hidden errors.
The
HS7541A
consists of a highly stable thin–
film R–2R ladder network and twelve NMOS
current switches (please refer to the
Block Dia-
gram
on the first page of this data sheet). The
switches are temperature compensated, and their
“on” resistances are binarily scaled so that the
voltage drop across each switch is identical,
which contributes to the stability of the DAC.
The internal feedback resistor used in the output
current–to–voltage conversion by an external
op amp is matched to the R–2R ladder.
CIRCUIT DESCRIPTION
General
The
HS7541A
is a 12-bit multiplying D/A con-
verter consisting of a highly stable, SiChrome
thin-film R-2R resistor ladder network, and
twelve pairs of NMOS current-steering switches
on a monolithic chip.
A simplified circuit of the
HS7541A
is shown in
Figure 1
. The R-2R inverted ladder binarily
divides the input currents that are switched
between the I
and I
bus lines. This switch-
ing allows a constant current to be maintained in
each ladder leg independent of the input code.