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參數(shù)資料
| 型號(hào)： | HS-80C85RH |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Radiation Hardened 8-Bit CMOS Microprocessor |
| 中文描述： | 8-BIT, 2 MHz, MICROPROCESSOR, CDIP40 |
| 文件頁數(shù)： | 18/19頁 |
| 文件大小： | 159K |
| 代理商： | HS-80C85RH |
18
HS-80C85RH
Spec Number
518054
NOTES:
1. Index area: A notch or a pin one identification mark shall be locat-
ed adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark. Alternately, a tab (dimension k)
may be used to identify pin one.
2. If a pin one identification mark is used in addition to a tab, the lim-
its of dimension k do not apply.
3. This dimension allows for off-center lid, meniscus, and glass
overrun.
4. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness. The maximum lim-
its of lead dimensions b and c or M shall be measured at the cen-
troid of the finished lead surfaces, when solder dip or tin plate
lead finish is applied.
5. N is the maximum number of terminal positions.
6. Measure dimension S1 at all four corners.
7. For bottom-brazed lead packages, no organic or polymeric mate-
rials shall be molded to the bottom of the package to cover the
leads.
8. Dimension Q shall be measured at the point of exit (beyond the
meniscus) of the lead from the body. Dimension Q minimum
shall be reduced by 0.0015 inch (0.038mm) maximum when sol-
der dip lead finish is applied.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH.
11. The basic lead spacing is 0.050 inch (1.27mm) between center
lines. Each lead centerline shall be located within
±
0.005 inch
(0.13mm) of its exact longitudinal position relative to lead 1 and
the highest numbered (N) lead.
E
E1
D
S1
b
Q
E2
A
C
1
A
A
M
c1
b1
(c)
(b)
SECTION A-A
BASE
METAL
LEAD FINISH
M
e
N
L
K42.A
TOP BRAZED
42 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
-
0.100
-
2.54
-
b
0.017
0.025
0.43
0.64
-
b1
0.017
0.023
0.43
0.58
-
c
0.007
0.013
0.18
0.33
-
c1
0.007
0.010
0.18
0.25
-
D
1.045
1.075
26.54
27.31
3
E
0.630
0.650
16.00
16.51
-
E1
-
0.680
-
17.27
3
E2
0.530
0.550
13.46
13.97
-
e
0.050 BSC
1.27 BSC
11
k
-
-
-
-
-
L
0.320
0.350
8.13
8.89
-
Q
0.045
0.065
1.14
1.65
8
S1
0.000
-
0.00
-
6
M
-
0.0015
-
0.04
-
N
42
42
-
Rev. 0 6/17/94
Packaging
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PDF描述 |
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| HS1-80C85RH | Radiation Hardened 8-Bit CMOS Microprocessor |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HS-80C85RH_02 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 8-Bit CMOS Microprocessor |
| HS-80C86RH | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 16-Bit CMOS Microprocessor |
| HS-80C86RH_00 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 16-Bit CMOS Microprocessor |
| HS810 | 制造商:Distributed By MCM 功能描述:HARDSTART PACK 1/12-1/3HP |
| HS-810 | 制造商:Hozan Tool Industrial Co Ltd 功能描述: |
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