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參數(shù)資料
| 型號： | HRF-AT4511-TR |
| 元件分類： | 衰減器 |
| 英文描述： | 0 MHz - 4000 MHz RF/MICROWAVE VARIABLE ATTENUATOR, 3.8 dB INSERTION LOSS-MAX |
| 封裝： | 4 X 4 MM, PLASTIC, VQFN, LCC-16 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 735K |
| 代理商： | HRF-AT4511-TR |
HRF-AT4511
________________________________________________________________________________________________________
Web Site:
www.mysoiservices.com
Honeywell
Email:
mysoiservices@honeywell.com
Solid State Electronics Center
15.5 dB, DC-4GHz, 5 Bit
Serial Digital Attenuator
Features
Very Low DC Power Consumption
Attenuation In Steps From 0.5 dB To 15.5 dB
Single Or Dual Power Supply Voltages
Serial Data Interface
50 Ohm Compatible Impedance
Space Saving VQFN Surface Mount Packaging
Product Description
The Honeywell HRF-AT4511 is a 5-bit digital
attenuator that is ideal for use in broadband
communication system applications that require
accuracy, speed and low power consumption. The
HRF-AT4511 is manufactured with Honeywell's
patented
Silicon
On
Insulator
(SOI)
CMOS
manufacturing
technology, which provides the
performance of GaAs with the economy and
integration capabilities of conventional CMOS.
HRF-AT4511 in VQFN Package
RF Electrical Specifications @ + 25oC
Results @ Vdd = 5.0 +/- 10%, Vss = 0 unless otherwise stated, Z0 = 50 Ohms
Contact Honeywell for relative performance at other supply configurations
Parameter
Test Condition
Frequency
Minimum
Typical
Maximum
Units
Insertion Loss
DC – 0.5 GHz
2.0 GHz
3.0 GHz
4.0 GHz
1.60
2.00
2.20
3.60
1.80
2.10
2.40
3.80
dB
1dB Compression
VSS = 0V, Input Power
1.0 GHz
2.0 GHz
23.0
21.5
dBm
1dB Compression
VSS = - 3, Input Power
1.0 GHz
2.0 GHz
29.0
28.0
dBm
Input IP3
VSS = 0V Two-tone inputs Up
To +5 dBm @ 0 dBm
Attenuation
2.0 GHz
35.5
dBm
Input IP3
Vss = - 3
Two-tone inputs Up To + 5
dBm @ 0 dBm Attenuation
2.0 GHz
37.0
dBm
Return Loss*
Any Bit or Combination of Bits
DC - 4.0 GHz
-11
-15
dB
Attenuation Accuracy
All attenuation states
DC - 1.0 GHz
2.0 GHz
3.0 GHz
4.0 GHz
+/-(0.17 + 3% of programmed IL)
+/-(0.22 + 3% of programmed IL)
+/-(0.33 + 3% of programmed IL)
+/-(0.45 + 3% of programmed IL)
dB
Trise, Tfall*
Ton, Toff (Tpd)
Transients
10% To 90%
50% Cntl To 90%/10%RF
In-Band
10
15
30
nS
mV
T clock Period (Tprd)*
T high / T low = minimum clock period
50
nS
T data set up (Tsup)*
Set up to rising edge of clock
5
nS
T data hold (Thld)*
Data hold after rising edge of clock
2
nS
T latch set up (Tlsup)*
Data set up to rising edge of OE
5
nS
0.01uF Decoupling Capacitors Required On Power Supply Rails.
*By design
12001 State Highway 55
2004 4511W
Published August 2004
Page 1
Plymouth, Minnesota 55441-4799
1-800-323-8295
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