參數(shù)資料
型號: HN58X2432FPIAG
元件分類: DRAM
英文描述: EEPROM
中文描述: EEPROM的
文件頁數(shù): 18/20頁
文件大?。?/td> 59K
代理商: HN58X2432FPIAG
HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG
18
Notes
Data Protection at V
CC
On/Off
When V
CC
is turned on or off, noise on the SCL and SDA inputs generated by external circuits (CPU, etc)
may act as a trigger and turn the EEPROM to unintentional program mode. To prevent this unintentional
programming, this EEPROM have a power on reset function. Be careful of the notices described below in
order for the power on reset function to operate correctly.
SCL and SDA should be fixed to V
CC
or V
SS
during V
CC
on/off. Low to high or high to low transition
during V
CC
on/off may cause the trigger for the unintentional programming.
V
CC
should be turned off after the EEPROM is placed in a standby state.
V
CC
should be turned on from the ground level(V
SS
) in order for the EEPROM not to enter the
unintentional programming mode.
V
CC
turn on speed should be longer than 10 us.
Write/Erase Endurance and Data Retention Time
The endurance is 10
5
cycles in case of page programming and 10
4
cycles in case of byte programming (1%
cumulative failure rate). The data retention time is more than 10 years when a device is page-programmed
less than 10
4
cycles.
Noise Suppression Time
This EEPROM have a noise suppression function at SCL and SDA inputs, that cut noise of width less than
50 ns. Be careful not to allow noise of width more than 50 ns.
相關PDF資料
PDF描述
HN58X2432I I2C Serial EEPROM
HN58X2432T I2C Serial EEPROM
HN58X2464FP I2C Serial EEPROM
HN58X2464T I2C Serial EEPROM
HN58X25128I Datasheet|ADE-203-1371|NOV.15.02|170K
相關代理商/技術參數(shù)
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