參數(shù)資料
型號(hào): HN58V65API-10
廠商: Renesas Technology Corp.
英文描述: 64k EEPROM (8-kword x 8-bit) Ready/Busy function, RES function (HN58V66A) Wide Temperature Range version
中文描述: 64K的EEPROM的(8 KWord的× 8位)就緒/忙功能水庫(kù)功能(HN58V66A)寬溫版本
文件頁(yè)數(shù): 10/28頁(yè)
文件大?。?/td> 225K
代理商: HN58V65API-10
HN58V65AI/HN58V66AI/HN58V65A-SR/HN58V66A-SR Series
Rev.3.00, Feb.02.2004, page 10 of 26
Write Cycle 2
(4.5
V
CC
5.5 V)
Parameter
Symbol Min
*
3
Typ
Max
Unit
Test conditions
Address setup time
t
AS
0
30
10
*
4
ns
Address hold time
CE
to write setup time (
WE
controlled)
CE
hold time (
WE
controlled)
WE
to write setup time (
CE
controlled)
WE
hold time (
CE
controlled)
OE
to write setup time
OE
hold time
t
AH
50
ns
t
CS
0
ns
t
CH
0
ns
t
WS
0
ns
t
WH
0
ns
t
OES
0
ns
t
OEH
0
ns
Data setup time
t
DS
50
ns
Data hold time
WE
pulse width (
WE
controlled)
CE
pulse width (
CE
controlled)
t
DH
0
ns
t
WP
100
ns
t
CW
100
ns
Data latch time
t
DL
50
ns
μ
s
μ
s
ms
Byte load cycle
t
BLC
0.2
Byte load window
t
BL
100
120
0
*
5
Write cycle time
t
WC
Time to device busy
t
DB
ns
Write start time
Reset protect time
*
2
Reset high time
*
2, 6
Notes: 1. t
DF
and t
DFR
are defined as the time at which the outputs achieve the open circuit conditions and
are no longer driven.
2. This function is supported by only the HN58V66A.
3. Use this device in longer cycle than this value.
4. t
WC
must be longer than this value unless polling techniques or RDY/
Busy
are used. This device
automatically completes the internal write operation within this value.
5. Next read or write operation can be initiated after t
DW
if polling techniques or RDY/
Busy
are used.
6. This parameter is sampled and not 100% tested.
7. A6 through A12 are page address and these addresses are latched at the first falling edge of
WE
.
8. A6 through A12 are page address and these addresses are latched at the first falling edge of
CE
.
9. See AC read characteristics.
t
DW
ns
μ
s
μ
s
t
RP
100
t
RES
1
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