參數(shù)資料
型號(hào)： HM67S3632BP-7
英文描述： x36 Fast Synchronous SRAM
中文描述： x36快速同步SRAM
文件頁(yè)數(shù)： 5/24頁(yè)
文件大小： 129K
代理商： HM67S3632BP-7
HM67S18258 Series
5
Truth Table
SS
G
SWE
SWEa
SWEc
K
K
Operation
DQa
DQc
H
X
X
X
X
L-H
H-L
Dead (not selected)
High-Z
High-Z
L
H
H
X
X
L-H
H-L
Dead (Dummy read)
High-Z
High-Z
L
L
H
X
X
L-H
H-L
Read
Dout
Dout
L
X
L
L
L
L-H
H-L
Write
Din
Din
L
X
L
H
L
L-H
H-L
Write
High-Z
Din
L
Notes: 1. X means don’t care for synchronous inputs, and H or L for asynchronous inputs.
2.
SWE
,
SS
,
SWEa
,
SWEc
, SA are sampled at the rising edge of K clock.
X
L
L
H
L-H
H-L
Write
Din
High-Z
Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
Note
Supply voltage
V
DD
V
DDQ
V
IN
Ta
–0.5 to +4.6
V
1
Output Supply Voltage
–0.5 to V
DD
+0.5
–0.5 to V
DD
+0.5
0 to 70 (Tj max = 110)
V
1, 4
Voltage on any pin
V
1, 4
Operating Temperature
°
C
°
C
Storage Temperature
Tstg (bias)
–55 to 125
Input Latchup Current
I
LI
Iout
±
200
±
25
mA
Output Current per pin
Notes: 1. All voltage are referenced to V
SS
.
2. Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional
operation should be restricted the Operation Conditions. Exposure to higher than recommended
voltages for extended periods of time could affect device reliability.
3. These Bi-CMOS memory circuits have been designed to meet the DC and AC specifications
shown in the tables after thermal equilibrium has been established.
4. Not exceed 4.6 V
5. Power Up Initialization
The following supply voltage application sequence is recommended: V
SS
, V
DD
then V
DDQ
.
Remember according to the Absolute Maximum Ratings table, V
DDQ
is not to exceed V
DD
+ 0.5 V,
whatever the instantaneous value of V
DD
.
mA
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