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參數(shù)資料
| 型號(hào)： | HM658512ALRR-7V |
| 廠商： | Hitachi,Ltd. |
| 元件分類： | FPGA |
| 英文描述： | 50000 SYSTEM GATE 2.5 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 4個(gè)M移動(dòng)存儲(chǔ)芯片（512 KWord的× 8位）2度刷新 |
| 文件頁數(shù)： | 17/22頁 |
| 文件大?。?/td> | 105K |
| 代理商： | HM658512ALRR-7V |
HM658512A Series
17
Low V
CC
Data Retention Timing Waveform
Data Retention mode
VDR
FAS
FS
FR
RFS
t
FP
4.5V
2.4V
0.8V
2.4V
0.8V
V
CE
OE/RFSH
CE
Vcc-0.2V
OE/RFSH
0.2V
CC
RFD
t
t
t
t
t
Notes:
1.
2.
3.
4.
Rise time and fall time of power supply voltage must be smaller than 0.05 V/ms.
Keep
CE
≥
V
CC
– 0.2 V during data retention mode.
Regarding t
RFD
, t
FP
, t
FAS
and t
RFS
, refer to AC characteristics.
Input voltage should be lower than V
CC
+1.5 V in data retention mode.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM658512ALRR-8 | 4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
| HM658512ALRR-8V | 4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
| HM658512ALTT-7 | 50000 SYSTEM GATE 2.5 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN |
| HM658512ALTT-7V | 50000 SYSTEM GATE 2.5 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN |
| HM658512ALTT-8 | 4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM658512ALRR-8 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
| HM658512ALRR-8V | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
| HM658512ALTT-10 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
| HM658512ALTT-10V | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
| HM658512ALTT-7 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
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