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參數(shù)資料
| 型號(hào)： | HM62W16256BLTT-5SL |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | RES 100-OHM 1% 0.25W 100PPM THICK-FILM SMD-1206 5K/REEL-7IN-PA |
| 中文描述： | 四米的SRAM（256 - KWord的x 16位） |
| 文件頁數(shù)： | 7/16頁 |
| 文件大?。?/td> | 79K |
| 代理商： | HM62W16256BLTT-5SL |
HM62W16256B Series
7
AC Characteristics
(Ta = 0 to +70
°
C, V
CC
= 3.3 V ± 0.3 V, unless otherwise noted.)
Test Conditions
Input pulse levels: V
IL
= 0.4 V, V
IH
= 2.4 V
Input rise and fall time: 5 ns
Input timing reference levels: 1.4 V
Output timing reference levels: 1.4 V/1.4 V (HM62W16256B-5)
: 2.0 V/0.8 V (HM62W16256B-7)
Output load (Including scope and jig)
1.4 V
50 pF
500
Dout
Read Cycle
HM62W16256B
-5
-7
Parameter
Symbol
Min
Max
Min
Max
Unit
Notes
Read cycle time
t
RC
t
AA
t
ACS1
t
ACS2
t
OE
t
OH
t
BA
t
CLZ1
t
CLZ2
t
BLZ
t
OLZ
t
CHZ1
t
CHZ2
t
BHZ
t
OHZ
55
—
70
—
ns
Address access time
—
55
—
70
ns
Chip select access time
—
55
—
70
ns
—
55
—
70
ns
Output enable to output valid
—
35
—
40
ns
Output hold from address change
LB
,
UB
access time
10
—
10
—
ns
—
55
—
70
ns
Chip select to output in low-Z
10
—
10
—
ns
2, 3
10
—
10
—
ns
2, 3
LB
,
UB
enable to low-z
5
—
5
—
ns
2, 3
Output enable to output in low-Z
5
—
5
—
ns
2, 3
Chip deselect to output in high-Z
0
20
0
25
ns
1, 2, 3
0
20
0
25
ns
1, 2, 3
LB
,
UB
disable to high-Z
0
20
0
25
ns
1, 2, 3
Output disable to output in high-Z
0
20
0
25
ns
1, 2, 3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM62W16256BLTT-7 | 4 M SRAM (256-kword x 16-bit) |
| HM62W16256BLTT-7SL | 4 M SRAM (256-kword x 16-bit) |
| HM62W16256B | 4 M SRAM (256-kword ×16-bit)(4 M 靜態(tài)RAM(256k字×16位)) |
| HM62W16258BI | 4 M SRAM (256-kword ×16-bit)(4 M 靜態(tài)RAM(256k字×16位)) |
| HM62W16258BLTT-5 | 4 M SRAM (256-kword x 16-bit) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM62W4100HJP15 | 制造商:Renesas Electronics Corporation 功能描述: |
| HM62W8512BLFP-5 | 制造商:HITACHI 功能描述: |
| HM62W8512BLTTI7 | 制造商:Hitachi 功能描述: |
| HM-630 | 制造商:Black Box Corporation 功能描述:FACE PLATE:HM-STAINLESS |
| HM63021FP | 制造商:Panasonic Industrial Company 功能描述:IC |
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