參數(shù)資料
型號: HM62256BLSP-7SL
廠商: Hitachi,Ltd.
英文描述: Triple 3-Input Positive-AND Gates 14-CDIP -55 to 125
中文描述: 256k的SRAM(32 KWord的× 8位)
文件頁數(shù): 5/20頁
文件大?。?/td> 154K
代理商: HM62256BLSP-7SL
HM62256B Series
5
Operation Table
WE
CS
OE
Mode
V
CC
current
I
SB
, I
SB1
I
CC
I
CC
I
CC
I
CC
I/O pin
Ref. cycle
×
H
×
Standby
High-Z
H
L
H
Output disable
High-Z
H
L
L
Read
Dout
Read cycle (1)to (3)
L
L
H
Write
Din
Write cycle (1)
L
Note:
×
: H or L
L
L
Write
Din
Write cycle (2)
Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
Power supply voltage relative to V
SS
Terminal voltage on any pin relative to V
SS
Power dissipation
V
CC
V
T
P
T
Topr
–0.5 to +7.0
V
–0.5*
1
to V
CC
+0.3*
2
1.0
V
W
Operating temperature range
0 to +70
°
C
°
C
°
C
Storage temperature range
Tstg
–55 to +125
Storage temperature range under bias
Notes: 1. V
T
min: –3.0 V for pulse half-width
50 ns
2. Maximum voltage is 7.0 V
Tbias
–10 to +85
DC Operating Conditions
(Ta = 0 to +70
°
C)
Parameter
Symbol
Min
Typ
Max
Unit
Notes
Supply voltage
V
CC
V
SS
V
IH
V
IL
4.5
5.0
5.5
V
0
0
0
V
Input high voltage
2.2
V
CC
+ 0.3
0.8
V
Input low voltage
Note:
1. V
IL
min: –3.0 V for pulse half-width
50 ns
–0.5*
1
V
相關(guān)PDF資料
PDF描述
HM62256BLT-7SL Triple 3-Input Positive-AND Gates 14-CFP -55 to 125
HM62256BLT-8 Triple 3-Input Positive-AND Gates 14-CDIP -55 to 125
HM62256BLTM-5SL Triple 3-Input Positive-AND Gates 20-LCCC -55 to 125
HM62256BLTM-7SL Triple 3-Input Positive-AND Gates 14-CDIP -55 to 125
HM62256BLTM-7UL Triple 3-Input Positive-AND Gates 14-CFP -55 to 125
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HM62256BLT-7SL 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:256k SRAM (32-kword x 8-bit)
HM62256BLT-8 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:256k SRAM (32-kword x 8-bit)
HM62256BLTM-4SL 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM
HM62256BLTM-5SL 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:256k SRAM (32-kword x 8-bit)
HM62256BLTM-7SL 制造商:Hitachi 功能描述:Static RAM, 32Kx8, 28 Pin, Plastic, TSSOP