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參數(shù)資料
| 型號： | HM62256ALP-8 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Quadruple 2-Input Positive-AND Gates 14-CFP -55 to 125 |
| 中文描述： | 32,768字× 8位高速CMOS靜態(tài)RAM |
| 文件頁數(shù)： | 3/11頁 |
| 文件大小： | 71K |
| 代理商： | HM62256ALP-8 |
Pin Description
Symbol
——————————————————————–
A0 – A14
Address
——————————————————————–
I/O0 – I/O7
Input/output
——————————————————————–
CS
Chip select
——————————————————————–
WE
Write enable
——————————————————————–
Function
Block Diagram
A5
A4
A3
A11
A12
A9
A8
A7
A6
I/O0
I/O7
CS
WE
OE
A0 A1 A2 A10
A14
A13
V
V
CC
SS
Row
Decoder
Memory Matrix
512 512
Column I/O
Column Decoder
Input
Data
Control
Timing Pulse Generator
Read/Write Control
Symbol
——————————————————————–
OE
Output enable
——————————————————————–
NC
No connection
——————————————————————–
V
CC
Power supply
——————————————————————–
V
SS
Ground
——————————————————————–
Function
3
HM62256A Series
HM62256A Series
相關PDF資料 |
PDF描述 |
|---|---|
| HM62256ALP-8SL | Quadruple 2-Input Positive-AND Gates 14-CDIP -55 to 125 |
| HM62256ALR-8 | Quadruple 2-Input Positive-AND Gates 20-LCCC -55 to 125 |
| HM62256ALR-8SL | Quadruple 2-Input Positive-AND Gates 14-CDIP -55 to 125 |
| HM62256ALSP-10 | Quadruple 2-Input Positive-AND Gates 14-CFP -55 to 125 |
| HM62256ALSP-10SL | Quadruple 2-Input Positive-AND Gates With Open-Collector Outputs 14-CDIP -55 to 125 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HM62256ALP-8SL | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:32,768-word x 8-bit High Speed CMOS Static RAM |
| HM62256ALR-10 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:32,768-word x 8-bit High Speed CMOS Static RAM |
| HM62256ALR-10SL | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:32,768-word x 8-bit High Speed CMOS Static RAM |
| HM62256ALR-12 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:32,768-word x 8-bit High Speed CMOS Static RAM |
| HM62256ALR-12SL | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:32,768-word x 8-bit High Speed CMOS Static RAM |
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