參數(shù)資料
型號(hào): HM5225405BTT-B6
廠(chǎng)商: ELPIDA MEMORY INC
元件分類(lèi): DRAM
英文描述: 256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
中文描述: 64M X 4 SYNCHRONOUS DRAM, 6 ns, PDSO54
封裝: 0.400 INCH, PLASTIC, TSOP2-54
文件頁(yè)數(shù): 30/63頁(yè)
文件大?。?/td> 462K
代理商: HM5225405BTT-B6
HM5225165B/HM5225805B/HM5225405B-75/A6/B6
Data Sheet E0082H10
30
Write command to Read command interval:
1. Same bank, same ROW address:
When the read command is executed at the same ROW address of the
same bank as the preceding write command, the read command can be performed after an interval of no less
than 1 clock. However, in the case of a burst write, data will continue to be written until one clock before the
read command is executed.
WRITE to READ Command Interval (1)
CLK
Command
Din
WRIT
READ
in A0
out B1
out B2
out B3
out B0
Dout
Column = A
Write
Column = B
Read
Column = B
Dout
CAS
Latency
DQM,
DQMU/DQML
Burst Write Mode
CAS
Latency = 2
Burst Length = 4
Bank 0
WRITE to READ Command Interval (2)
CLK
Command
Din
WRIT
READ
in A0
out B1
out B2
out B3
out B0
Dout
Column = A
Write
Column = B
Read
Column = B
Dout
CAS
Latency
in A1
DQM,
DQMU/DQML
Burst Write Mode
CAS
Latency = 2
Burst Length = 4
Bank 0
2. Same bank, different ROW address:
When the ROW address changes, consecutive read commands
cannot be executed; it is necessary to separate the two commands with a precharge command and a bank-
active command.
3. Different bank:
When the bank changes, the read command can be performed after an interval of no less
than 1 clock, provided that the other bank is in the bank-active state. However, in the case of a burst write,
data will continue to be written until one clock before the read command is executed (as in the case of the
same bank and the same address).
相關(guān)PDF資料
PDF描述
HM5225405BLTT-B6 256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
HM5225805BTT-75 256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
HM5225405BTT-75 256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
HM5225165BTT-A6 256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
HM5225805BTT-A6 256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HM5225645F 制造商:HITACHI 制造商全稱(chēng):Hitachi Semiconductor 功能描述:256M LVTTL interface SDRAM 100 MHz 1-Mword x 64-bit x 4-bank/2-Mword x 32-bit x 4-bank PC/100 SDRAM
HM5225645F-B60 制造商:HITACHI 制造商全稱(chēng):Hitachi Semiconductor 功能描述:256M LVTTL interface SDRAM 100 MHz 1-Mword x 64-bit x 4-bank/2-Mword x 32-bit x 4-bank PC/100 SDRAM
HM5225805B-75 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
HM5225805B-A6 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM
HM5225805B-B6 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM