參數(shù)資料
型號: HIP6500B
廠商: Intersil Corporation
元件分類: 基準電壓源/電流源
英文描述: Multiple Linear Power Controller with ACPI Control Interface
中文描述: 多重線性電源控制器ACPI控制接口
文件頁數(shù): 14/15頁
文件大?。?/td> 156K
代理商: HIP6500B
14
HIP6500B Application Circuit
Figure 14 shows an application circuit of an ACPI-
sanctioned power management system for a microprocessor
computer system. The power supply provides the 3.3V
SB
voltage (V
OUT1
), the PCI 3.3V
DUAL
voltage (V
OUT3
), the
RDRAM 2.5VMEM memory voltage (V
OUT2
), the 2.5V
CLK
clock voltage (V
OUT4
), and the 5V
DUAL
voltage (V
OUT5
)
from +3.3V, +5VSB, and +12VDC ATX supply outputs. For
systems employing SDRAM memory, replace R1 with 10k
and Q1 with an HUF76113SK8. Q4 can also be a PNP, such
as an MMBT2907AL. For detailed information on the circuit,
including a Bill-of-Materials and circuit board description,
see Application Note AN9862.
Also see Intersil Corporation’s web page (www.intersil.com)
or Intersil AnswerFAX
(321-724-7800) for the latest information.
C9
1
μ
F
C4
1
μ
F
R1
1K
2X150
μ
F
150
μ
F
220
μ
F
GND
5VSB
+3.3V
IN
+5V
SB
VSEN2
DRV2
C6,7
HIP6500B
12V
+12V
IN
V
OUT2
2.5V
MEM
Q1
2SD1802
V
OUT3
3.3V
DUAL
+5V
IN
C14
V
OUT5
5V
DUAL
3V3DL
3V3DLSB
Q2
Q3
Q4
FDV304P
Q5
1/2
HUF76113DK8
DLA
5VDLSB
FAULT/MSEL
5VDL
SS
CONFIGURATION
HARDWARE
EN5VDL
S3
+
+
C3
1
μ
F
C1
1
μ
F
C2
220
μ
F
+
C8
1
μ
F
+
C15
1
μ
F
2SD1802
SHUTDOWN
(FROM OPEN-DRAIN N-MOS)
1/2 HUF76113DK8
C10
U1
C13
0.1
μ
F
3V3SB
VCLK
V
OUT4
2.5V
CLK
150
μ
F
C11+
C12
1
μ
F
V
OUT1
3.3V
SB
C5
10
μ
F
+
SLP_S3
SLP_S5
FIGURE 14. TYPICAL HIP6500B APPLICATION DIAGRAM
3V3
EN3VDL
S5
5V
HIP6500B
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HIP6500BCB Multiple Linear Power Controller with ACPI Control Interface
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