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參數(shù)資料
| 型號(hào)： | HIP6015 |
| 廠(chǎng)商： | Intersil Corporation |
| 元件分類(lèi)： | FPGA |
| 英文描述： | FPGA - 100000 SYSTEM GATE 2.5 VOLT - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 降壓脈寬調(diào)制（PWM）控制器和輸出電壓監(jiān)視器 |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大?。?/td> | 203K |
| 代理商： | HIP6015 |
5
GND (Pin 11)
Signal ground for the IC. All voltage levels are measured with
respect to this pin.
PGOOD (Pin 12)
PGOOD is an open collector output used to indicate the
status of the converter output voltage. This pin is pulled low
when the converter output is not within
±
10% of the
DACOUT reference voltage. Exception to this behavior are
the cases where the VID pins combination yield a 0V
converter output; in these cases PGOOD asserts a high
level.
PHASE (Pin 13)
Connect the PHASE pin to the upper MOSFET source. This
pin is used to monitor the voltage drop across the MOSFET
for over-current protection. This pin also provides the return
path for the upper gate drive.
UGATE (Pin 14)
Connect UGATE to the upper MOSFET gate. This pin
provides the gate drive for the upper MOSFET.
BOOT (Pin 15)
This pin provides bias voltage to the upper MOSFET driver.
A bootstrap circuit may be used to create a BOOT voltage
suitable to drive a standard N-Channel MOSFET.
NC (Pin 16)
No connection.
NC (Pin 17)
No connection.
V
CC
(Pin 18)
Provide a 12V bias supply for the chip to this pin.
OVP (Pin 19)
The OVP pin can be used to drive an external SCR in the
event of an overvoltage condition. Output rising 15% more
than the DAC-set voltage triggers a high output on this pin
and disables PWM gate drive circuitry.
R
T
(Pin 20)
This pin provides oscillator switching frequency adjustment.
By placing a resistor (R
T
) from this pin to GND, the nominal
200kHz switching frequency is increased according to the
following equation:
Conversely, connecting a pull-up resistor (R
T
) from this pin
to V
CC
reduces the switching frequency according to the
following equation:
Functional Description
Initialization
The HIP6015 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary.
The Power-On Reset (POR) function continually monitors
the input supply voltages. The POR monitors the bias
voltage at the V
CC
pin and the input voltage (V
IN
) on the
OCSET pin. The level on OCSET is equal to V
IN
less a fixed
voltage drop (see over-current protection). The POR function
initiates soft start operation after both input supply voltages
exceed their POR thresholds. For operation with a single
+12V power source, V
IN
and V
CC
are equivalent and the
+12V power source must exceed the rising V
CC
threshold
before POR initiates operation.
Soft Start
The POR function initiates the soft start sequence. An
internal 10
μ
A current source charges an external capacitor
(C
SS
) on the SS pin to 4V. Soft start clamps the error
amplifier output (COMP pin) and reference input (+ terminal
of error amp) to the SS pin voltage. Figure 3 shows the soft
start interval with C
SS
= 0.1
μ
F. Initially the clamp on the error
amplifier (COMP pin) controls the converter’s output voltage.
At t
1
in Figure 3, the SS voltage reaches the valley of the
oscillator’s triangle wave. The oscillator’s triangular
waveform is compared to the ramping error amplifier voltage.
This generates PHASE pulses of increasing width that
charge the output capacitor(s). This interval of increasing
pulse width continues to t
2
. With sufficient output voltage,
the clamp on the reference input controls the output voltage.
This is the interval between t
2
and t
3
in Figure 3. At t
3
the SS
voltage exceeds the DACOUT voltage and the output
voltage is in regulation. This method provides a rapid and
controlled output voltage rise. The PGOOD signal toggles
‘high’ when the output voltage (V
SEN
pin) is within
±
5% of
DACOUT. The 2% hysteresis built into the power good
comparators prevents PGOOD oscillation due to nominal
output voltage ripple.
Fs
200kHz
T
6
)
--------------------
+
≈
(R
T
to GND)
Fs
200kHz
T
7
)
--------------------
–
≈
(R
T
to 12V)
0V
0V
0V
TIME (5ms/DIV.)
SOFT-START
(1V/DIV.)
OUTPUT
VOLTAGE
(1V/DIV.)
t
2
t
3
PGOOD
(2V/DIV.)
t
1
FIGURE 3. SOFT START INTERVAL
HIP6015
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HIP6015 WAF | 制造商:Harris Corporation 功能描述: |
| HIP6015CB | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述: |
| HIP6015CB WAF | 制造商:Harris Corporation 功能描述: |
| HIP6015CB-T | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| HIP6016 | 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:Advanced PWM and Dual Linear Power Control |
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