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參數(shù)資料
| 型號(hào)： | HIP1012CB |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | 512 MACROCELL 3.3 VOLT ZERO POWER ISP CP - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO14 |
| 封裝： | PLASTIC, MS-012AB, SOIC-14 |
| 文件頁數(shù)： | 3/15頁 |
| 文件大?。?/td> | 173K |
| 代理商： | HIP1012CB |
3
Pin Descriptions
PIN #
SYMBOL
FUNCTION
DESCRIPTION
1
3V/12VS
3.3 V/12V Source
Connect to source of associated external N-Channel MOSFET switch to sense output
voltage.
2
3V/12VG
3.3V/12V Gate
Connect to the gate of associated N-Channel MOSFET switch. A capacitor from this node
to ground sets the turn-on ramp. At turn-on this capacitor will be charged to 17.4V by a 10
μ
A
current source when in 5v/12V mode of operation, otherwise capacitor will be charged to
11.4V. A small resistor (10 - 200
) should be placed in series with the gate capacitor to
ground to prevent current oscillations.
3
V
DD
Chip Supply
Connect to 12V supply. This can be either connected directly to the +12V rail supplying the
load voltage or to a dedicated V
DD
+12V supply. If the former is chosen special attention to
V
DD
decoupling must be paid.
4
MODE/
PWRON1
Power ON/ Reset
Invokes 3.3V operation
whenshortedtoV
DD
,pin3.
PWRON1 and PWRON2 are used to turn-on and reset the chip. Both outputs turn-on when
either pin is driven low. After a current limit time out, the chip is reset by the rising edge of a
reset signal applied to either PWRON pin. Each input has 100
μ
A pull up capability which is
compatible with 3V and 5V open drain and standard logic. PWRON1 is also used to invoke
3.3V control operation in preference to +12V control. By tying pin 4 to pin 3 the charge pump
is disabled and the UV threshold also shifts to 2.8V.
5
PWRON2
Power ON/ Reset
6
5VG
5V Gate
Connect to the gate of the external 5V N-Channel MOSFET. A capacitor from this node to
ground sets the turn-on ramp. At turn-on this capacitor will be charged to 11.4V by a 10
μ
A
current source. A small resistor (10 - 200
) should be placed in series with the gate
capacitor to ground to prevent current oscillations.
7
5VS
5V Source
Connect to the source side of 5V external N-Channel MOSFET switch to sense output
voltage.
8
5VISEN
5V Current Sense
Connect to the load side of the 5V sense resistor to measure the voltage drop across this
resistor between 5VS and 5VISEN pins.
9
PGOOD
Power Good indicator
Indicates that all output voltages are within specification. PGOOD is driven by an open drain
N-Channel MOSFET. It is pulled low when any output is not within specification.
10
C
TIM
Current Limit Timing
Capacitor
Connect a capacitor from this pin to ground. This capacitor controls the time between the
onset of current limit and chip shutdown (current limit time-out). The duration of current limit
time-out (in seconds) = 200k
x C
TIM
(Farads).
11
C
PUMP
Charge Pump
Capacitor
Connect a 0.1
μ
F capacitor between this pin and V
DD
(pin3). Directly connect this pin to V
DD
when in 3.3V control mode.
12
GND
Chip Ground
13
R
ILIM
Current Limit Set
Resistor
A resistor connected between this pin and ground determines the current level at which
current limit is activated. This current is determined by the ratio of the R
ILIM
resistor to the
sense resistor (R
SENSE
). The current at current limit onset is equal to 10
μ
A x (R
ILIM
/
R
SENSE
). The HIP1012 is limited to a 10k
min value (OC Vth = 100mV) resistor whereas
the HIP1012A can accommodate a 5k
resistor for a lower OC Vth (50mV).
14
3V/12VISEN
3.3V/12V Current Sense
Connect to the load side of sense resistor to measure the voltage drop across this resistor.
HIP1012, HIP1012A
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