參數(shù)資料
型號: HIP1012ACB-T
廠商: HARRIS SEMICONDUCTOR
元件分類: 電源管理
英文描述: Dual Power Distribution Controller
中文描述: POWER SUPPLY SUPPORT CKT, PDSO14
文件頁數(shù): 12/15頁
文件大?。?/td> 173K
代理商: HIP1012ACB-T
12
TABLE 5. HIP1012EVAL1 BOARD COMPONENT LISTING
COMPONENT
DESIGNATOR
COMPONENT NAME
COMPONENT DESCRIPTION
GENERIC BOARD
U1
HIP1012CB
Intersil Corporation, HIP1012CB Dual Power Controller
Q1, Q2
RF1K49156
Intersil Corporation, 30V, 30m
, 6.3A Logic Level N-Channel
MOSFET
QxB and QxC
NOT PROVIDED
Mounting areas for additional 8 SOIC
, DPAK or D
2
PAK packaged
MOSFETs
R
1
5V Sense Resistor
100m
,
1
%,
Metal Strip current sensing resistor
R
2
3.3V/12V Sense Resistor
20m
,
1
%,
Metal Strip current sensing resistor
R
3
, R
4
Loop compensation Resistors
20
, Resistor in series with gate capacitor. This RC may be necessary
to provide current loop stability. Keep resistor < 50
.
R
5
Current Limit Set Resistor
10k
, Current limit = ~10
μ
A x (R
ILIM
/ R
SENSE
).
R*
Isolation resistor (not provided, see Decoupling
Concerns in Critical Items section)
Add resistor (<50
) to isolate V
DD
from load transients if necessary to
eliminate random V
DD
low reset. Cut short to install.
C
3
, C
4
Gate Timing Capacitors
0.01
μ
F, 10
μ
A charging I source provides slow ramp on of N-Channel
MOSFETs
C
1
Charge Pump Capacitor
0.1
μ
F, Charge Pump Capacitor necessary for +12V and +5V
operation.
C
2
Time-out Set Capacitor
0.047
μ
F, Provides ~9ms of time-out period prior to latch off during
which IOC can be resolved. The duration of current limit time-out (in
seconds) = 200k
x C
TIM
(Farads).
C
5
Vdd decoupling capacitor
0.1
μ
F, Provides V
DD
decoupling
JP1
JP2
JP3
JP4
Jumper to configure PWRON2
Jumper to configure VDD
Jumper to configure Charge Pump Cap
Jumper to configure PWRON1
See Table 3 for jumper configuration descriptions
LED1
Pgood indicator
Lit indicates a fault condition
W1
NOT PROVIDED
Tie point for dedicated +12V HIP1012 supply, use in default
configuration
TP1 - TP14
Test Points for HIP1012 pin 1 to pin 14
P1 - P2
Edge connector fingers
Modify edge connector finger lengths for power sequencing
LOAD BOARD
SW11 and RL1
5V high load (7
)
Switch and load resistor pair to invoke high current load on 5V
SW12 and RL2
5V low load (10
)
Switch and load resistor pair to invoke low current load on 5V
SW13 and RL3
3.3V high load (0.8
)
Switch and load resistor pair to invoke high current load on 3.3V
SW14 and RL4
3.3V low load (1.6
)
Switch and load resistor pair to invoke low current load on 3.3V
LED2, LED3
Load “HOT” indicators
Lit indicates N-Channel MOSFETs are on and loads are HOT
BUS BOARD
Bus interconnect board
HIP1012, HIP1012A
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