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參數(shù)資料
| 型號： | HI5767EVAL2 |
| 廠商： | Intersil Corporation |
| 英文描述： | 10-Bit, 20/40/60 MSPS A/D Converter with Internal Voltage Reference |
| 中文描述： | 10位，20/40/60 MSPS的A / D轉(zhuǎn)換器內(nèi)部電壓基準 |
| 文件頁數(shù)： | 6/13頁 |
| 文件大?。?/td> | 133K |
| 代理商： | HI5767EVAL2 |
6
DIGITAL INPUTS
Input Logic High Voltage, V
IH
CLK, DFS, OE
2.0
-
-
V
Input Logic Low Voltage, V
IL
CLK, DFS, OE
-
-
0.8
V
Input Logic High Current, I
IH
CLK, DFS, OE, V
IH
= 5V
-10.0
-
+10.0
μ
A
Input Logic Low Current, I
IL
CLK, DFS, OE, V
IL
= 0V
-10.0
-
+10.0
μ
A
Input Capacitance, C
IN
-
7
-
pF
DIGITAL OUTPUTS
Output Logic High Voltage, V
OH
I
OH
= 100
μ
A; DV
CC2
= 5V
I
OL
= 100
μ
A; DV
CC2
= 5V
4.0
-
-
V
Output Logic Low Voltage, V
OL
-
-
0.8
V
Output Three-State Leakage Current, I
OZ
V
O
= 0/5V; DV
CC2
= 5V
I
OH
= 100
μ
A; DV
CC2
= 3V
I
OL
= 100
μ
A; DV
CC2
= 3V
-10
±
1
10
μ
A
Output Logic High Voltage, V
OH
2.4
-
-
V
Output Logic Low Voltage, V
OL
-
-
0.5
V
Output Three-State Leakage Current, I
OZ
V
O
= 0/5V; DV
CC2
= 3V
-10
±
1
10
μ
A
Output Capacitance, C
OUT
-
10
-
pF
TIMING CHARACTERISTICS
Aperture Delay, t
AP
-
5
-
ns
Aperture Jitter, t
AJ
-
5
-
ps
RMS
Data Output Hold, t
H
-
5
-
ns
Data Output Delay, t
OD
-
6
-
ns
Data Output Enable Time, t
EN
-
5
-
ns
Data Output Enable Time, t
DIS
-
5
-
ns
Data Latency, t
LAT
For a Valid Sample (Note 2)
-
-
7
Cycles
Power-Up Initialization
Data Invalid Time (Note 2)
-
-
20
Cycles
Sample Clock Pulse Width (Low)
f
S
= 40MSPS
11.3
12.5
-
ns
Sample Clock Pulse Width (High)
f
S
= 40MSPS
11.3
12.5
-
ns
Sample Clock Duty Cycle Variation
f
S
= 40MSPS
-
±
5
-
%
POWER SUPPLY CHARACTERISTICS
Analog Supply Voltage, AV
CC
4.75
5.0
5.25
V
Digital Supply Voltage, DV
CC1
4.75
5.0
5.25
V
Digital Output Supply Voltage, DV
CC2
At 3.0V
2.7
3.0
3.3
V
At 5.0V
4.75
5.0
5.25
V
Supply Current, I
CC
f
IN
= 1MHz and DFS = “0”
-
62
-
mA
Power Dissipation
f
IN
= 1MHz and DFS = “0”
AV
CC
or DV
CC
= 5V
±
5%
AV
CC
or DV
CC
= 5V
±
5%
-
310
-
mW
Offset Error Sensitivity,
V
OS
Gain Error Sensitivity,
FSE
-
±
0.7
-
LSB
-
±
0.1
-
LSB
NOTES:
2. Parameter guaranteed by design or characterization and not production tested.
3. With the clock low and DC input.
Electrical Specifications
AV
CC
= DV
CC1
= 5.0V, DV
CC2
= 3.0V; V
REFIN
= V
REFOUT
; f
S
= 40MSPS at 50% Duty Cycle;
C
L
= 10pF; T
A
= 25
o
C; Differential Analog Input; Typical Values are Test Results at 25
o
C,
Unless Otherwise Specified
(Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
HI5767
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