參數(shù)資料
型號: HI5731BIP
廠商: HARRIS SEMICONDUCTOR
元件分類: DAC
英文描述: LOW SIGNAL RELAY
中文描述: PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 12-BIT DAC, PDIP28
文件頁數(shù): 9/15頁
文件大?。?/td> 370K
代理商: HI5731BIP
3-9
Detailed Description
The HI5731 is a 12-bit, current out D/A converter. The DAC can
convert at 100 MSPS and runs on +5V and -5.2V supplies. The
architecture is an R/2R and segmented switching current cell
arrangement to reduce glitch. Laser trimming is employed to
tune linearity to true 12-bit levels. The HI5731 achieves its low
power and high speed performance from an advanced
BiCMOS process. The HI5731 consumes 650mW (typical) and
has an improved hold time of only 0.25ns (typical). The HI5731
is an excellent converter for use in communications
applications and high performance instrumentation systems.
Digital Inputs
The HI5731 is a TTL/CMOS compatible D/A. Data is latched
by a Master register. Once latched, data inputs D0 (LSB)
thru D11 (MSB) are internally translated from TTL to ECL.
The internal latch and switching current source controls are
implemented in ECL technology to maintain high switching
speeds and low noise characteristics.
Decoder/Driver
The architecture employs a split R/2R ladder and
Segmented Current source arrangement. Bits D0 (LSB) thru
D7 directly drive a typical R/2R network to create the binary
weighted current sources. Bits D8 thru D11 (MSB) pass thru
a “thermometer” decoder that converts the incoming data
into 15 individual segmented current source enables. This
split architecture helps to improve glitch, thus resulting in a
more constant glitch characteristic across the entire output
transfer function.
Clocks and Termination
The internal 12-bit register is updated on the rising edge of
the clock. Since the HI5731 clock rate can run to 100 MSPS,
to minimize reflections and clock noise into the part proper
termination should be used. In PCB layout clock runs should
be kept short and have a minimum of loads. To guarantee
consistent results from board to board controlled impedance
PCBs should be used with a characteristic line impedance
Z
O
of 50
.
To terminate the clock line, a shunt terminator to ground is
the most effective type at a 100 MSPS clock rate. A typical
value for termination can be determined by the equation:
R
T
= Z
O
,
for the termination resistor. For a controlled impedance
board with a Z
O
of 50
, the R
T
= 50
. Shunt termination is
best used at the receiving end of the transmission line or as
close to the HI5731 CLK pin as possible.
Rise and Fall times and propagation delay of the line will be
affected by the Shunt Terminator. The terminator should be
connected to DGND.
Noise Reduction
To reduce power supply noise, separate analog and digital
power supplies should be used with 0.1
μ
F and 0.01
μ
F
ceramic capacitors placed as close to the body of the
HI5731 as possible on the analog (AV
EE
) and digital (DV
EE
)
supplies. The analog and digital ground returns should be
connected together back at the device to ensure proper
operation on power up. The V
CC
power pin should also be
decoupled with a 0.1
μ
F capacitor.
Reference
The internal reference of the HI5731 is a -1.23V (typical)
bandgap voltage reference with 175
μ
V/
o
C of temperature
drift (typical). The internal reference is connected to the
Control Amplifier which in turn drives the segmented current
cells. Reference Out (REF OUT) is internally connected to
the Control Amplifier. The Control Amplifier Output (CTRL
OUT) should be used to drive the Control Amplifier Input
(CTRL IN) and a 0.1
μ
F capacitor to analog V
EE
. This
improves settling time by providing an AC ground at the
current source base node. The Full Scale Output Current is
controlled by the REF OUT pin and the set resistor (R
SET
).
The ratio is:
I
OUT
(Full Scale) = (V
REF OUT
/R
SET
) x 16,
The internal reference (REF OUT) can be overdriven with a
more precise external reference to provide better
performance over temperature. Figure 22 illustrates a typical
external reference configuration.
FIGURE 21. CLOCK LINE TERMINATION
R
T
= 50
HI5731
DAC
CLK
Z
O
= 50
FIGURE 22. EXTERNAL REFERENCE CONFIGURATION
(26) REF OUT
HI5731
R
-5.2V
-1.25V
HI5731
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