參數(shù)資料
型號(hào)： HI5731BIB
廠商： INTERSIL CORP
元件分類(lèi)： DAC
英文描述： 12-Bit, 100 MSPS, High Speed D/A Converter
中文描述： PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 12-BIT DAC, PDSO28
封裝： PLASTIC, MS-013-AE, SOIC-28
文件頁(yè)數(shù)： 3/15頁(yè)
文件大?。?/td> 370K
代理商： HI5731BIB
3-3
Absolute Maximum Ratings
Thermal Information
Digital Supply Voltage V
CC
to DGND . . . . . . . . . . . . . . . . . . . +5.5V
Negative Digital Supply Voltage DV
EE
to DGND . . . . . . . . . . -5.5V
Negative Analog Supply Voltage AV
EE
to AGND, ARTN. . . . . -5.5V
Digital Input Voltages (D11-D0, CLK) to DGND. . . . . DV
CC
to -0.5V
Internal Reference Output Current. . . . . . . . . . . . . . . . . . . .
±
2.5mA
Voltage from CTRL IN to AV
EE
. . . . . . . . . . . . . . . . . . . . 2.5V to 0V
Control Amplifier Output Current . . . . . . . . . . . . . . . . . . . . .
±
2.5mA
Reference Input Voltage Range. . . . . . . . . . . . . . . . . .-3.7V to AV
EE
Analog Output Current (I
OUT
) . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 1)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature
HI5731BIx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150
o
C
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
55
70
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
AV
EE
, DV
EE
= -4.94 to -5.46V, V
CC
= +4.75 to +5.25V, V
REF
= Internal
T
A
= 25
o
C for All Typical Values
PARAMETER
TEST CONDITIONS
HI5731BI
T
A
= -40
o
C TO 85
o
C
MIN
TYP
UNITS
MAX
SYSTEM PERFORMANCE
Resolution
Integral Linearity Error, INL
Differential Linearity Error, DNL
Offset Error, I
OS
Full Scale Gain Error, FSE
Offset Drift Coefficient
Full Scale Output Current, I
FS
Output Voltage Compliance Range
DYNAMIC CHARACTERISTICS
Throughput Rate
Output Voltage Full Scale Step
Settling Time, t
SETT
, Full Scale
Singlet Glitch Area, GE (Peak)
Doublet Glitch Area, (Net)
Output Slew Rate
Output Rise Time
Output Fall Time
Spurious Free Dynamic Range within a Window
(Note 3)
12
-
-
-
-
-
-
-
-
Bits
LSB
LSB
μ
A
%
μ
A/
o
C
mA
V
(Note 4) (“Best Fit” Straight Line)
(Note 4)
(Note 4)
(Notes 2, 4)
(Note 3)
0.75
0.5
20
1
-
20.48
-
1.5
1.0
75
10
0.05
-
0
(Note 3)
-1.25
(Note 3)
To
±
0.5 LSB Error Band R
L
= 50
(Note 3)
R
L
= 50
(Note 3)
100
-
-
-
-
MSPS
ns
20
-
-
-
-
-
-
-
-
-
-
-
-
-
-
5
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
pV-s
pV-s
V/
μ
s
ps
ps
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
R
L
= 50
, DAC Operating in Latched Mode (Note 3)
R
L
= 50
, DAC Operating in Latched Mode (Note 3)
R
L
= 50
, DAC Operating in Latched Mode (Note 3)
f
CLK
= 10 MSPS, f
OUT
= 1.23MHz, 2MHz Span
f
CLK
= 20 MSPS, f
OUT
= 5.055MHz, 2MHz Span
f
CLK
= 40 MSPS, f
OUT
= 16MHz, 10MHz Span
f
CLK
= 50 MSPS, f
OUT
= 10.1MHz, 2MHz Span
f
CLK
= 80 MSPS, f
OUT
= 5.1MHz, 2MHz Span
f
CLK
= 100 MSPS, f
OUT
= 10.1MHz, 2MHz Span
f
CLK
= 40 MSPS, f
OUT
= 2.02MHz, 20MHz Span
f
CLK
= 80 MSPS, f
OUT
= 2.02MHz, 40MHz Span
f
CLK
= 100 MSPS, f
OUT
= 2.02MHz, 50MHz Span
1,000
675
470
85
77
75
80
78
79
70
70
69
Spurious Free Dynamic Range to Nyquist
(Note 3)
REFERENCE/CONTROL AMPLIFIER
Internal Reference Voltage, V
REF
Internal Reference Voltage Drift
Internal Reference Output Current Sink/Source
Capability
(Note 4)
(Note 3)
(Note 3)
-1.27
-
-125
-1.23
175
-
-1.17
-
+50
V
μ
V/
o
C
μ
A
HI5731
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