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參數(shù)資料
| 型號： | HI5721BIB |
| 廠商： | INTERSIL CORP |
| 元件分類： | DAC |
| 英文描述： | 10-Bit, 125 MSPS, High Speed D/A Converter |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 0.0045 us SETTLING TIME, 10-BIT DAC, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數(shù)： | 3/14頁 |
| 文件大?。?/td> | 205K |
| 代理商： | HI5721BIB |
3-36
Absolute Maximum Ratings
Thermal Information
Digital Supply Voltage V
CC
to DGND . . . . . . . . . . . . . . . . . . . +5.5V
Negative Digital Supply Voltage DV
EE
to DGND . . . . . . . . . . -5.5V
Negative Analog Supply Voltage AV
EE
to AGND, ARTN. . . . . -5.5V
Digital Input Voltages (D9-D0, CLK, INVERT) . . . . . . . V
CC
to -0.5 V
Internal Reference Output Current. . . . . . . . . . . . . . . . . . . . . .500
μ
A
Control Amplifier Input Voltage Range. . . . . . . . . . . .AGND to -4.0V
Control Amplifier Output Current . . . . . . . . . . . . . . . . . . . . .
±
2.5mA
Reference Input Voltage Range. . . . . . . . . . . . . . . . . -3.7 V to AV
EE
Analog Output Current (I
OUT
) . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 1)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Power Dissipation
HI5721BIx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .750mW
Maximum Junction Temperature
HI5721BIx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150
o
C
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
55
70
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
AV
EE
, DV
EE
= -4.94 to -5.46V, V
CC
= +4.75 to +5.25V, CTRL AMP IN = REF OUT,
T
A
= 25
o
C for All Typical Values
PARAMETER
TEST CONDITIONS
HI5721BI
T
A
= -40
o
C TO 85
o
C
UNITS
MIN
TYP
MAX
SYSTEM PERFORMANCE
Resolution
10
-
-
Bits
Integral Linearity Error, INL
(Note 4) (“Best Fit” Straight Line)
-
±
0.5
±
1.5
LSB
Differential Linearity Error, DNL
(Note 4)
-
±
0.5
±
1.0
LSB
Offset Error, I
OS
(Note 4)
-
16
75
μ
A
Full Scale Gain Error, FSE
(Notes 2, 4)
-
2
10
%
Offset Drift Coefficient
(Note 3)
-
0.1
-
μ
A/
o
C
Full Scale Output Current, I
FS
-
-20.48
-
mA
Output Voltage Compliance Range
(Note 3)
-1.5
-
+3.0
V
DYNAMIC CHARACTERISTICS
Throughput Rate
(Note 3)
125.0
-
-
MSPS
Output Voltage Full Scale Step Settling Time, t
SETT FS
To
±
0.5 LSB Error Band R
L
= 50
(Note 3)
-
4.5
-
ns
Output Voltage Small Step Settling Time, t
SETT SM
100mV Step to
±
0.5 LSB Error Band, R
L
= 50
(Note 3)
-
3.5
-
ns
Singlet Glitch Area, GE (Peak Glitch)
R
L
= 50
(Note 3)
-
3.5
-
pVs
Doublet Glitch Area, (Net Glitch)
-
1.5
-
pVs
Output Slew Rate
R
L
= 50
,
DAC Operating in Latched Mode
(Note 3)
-
1,000
-
V/
μ
s
Output Rise Time
R
L
= 50
,
DAC Operating in Latched Mode
(Note 3)
-
675
-
ps
Output Fall Time
R
L
= 50
,
DAC Operating in Latched Mode
(Note 3)
-
470
-
ps
HI5721
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