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參數(shù)資料
| 型號(hào)： | HI5721-EVP |
| 廠商： | Intersil Corporation |
| 英文描述： | CONN PLUG 60POS 1.5MM SMD .5MM |
| 中文描述： | 10位，125 MSPS的高速D / A轉(zhuǎn)換 |
| 文件頁數(shù)： | 11/14頁 |
| 文件大?。?/td> | 205K |
| 代理商： | HI5721-EVP |
3-44
If higher multiplying frequencies are desired, the reference
input can be directly driven. The analog signal range is -3.3V
to -4.25V. The multiplying signal must be capacitively
coupled into REF IN onto a DC bias between -3.3V to -4.25V
(-3.8V typically).
Outputs
The outputs I
OUT
and I
OUT
are complementary current
outputs. Current is steered to either I
OUT
or I
OUT
in
proportion to the digital input code. The sum of the two
currents is always equal to the full scale current minus one
LSB. The current output can be converted to a voltage by
using a load resistor. Both current outputs should have the
same load resistor (64
typically). By using a 64
load on
the output, a 50
effective output resistance (R
OUT
) is
achieved due to the 227
(
±
15%) parallel resistance seen
looking back into the output. This is the nominal value of the
R2R ladder of the DAC. The 50
output is needed for
matching the output with a 50
line. The load resistor should
be chosen so that the effective output resistance (R
OUT
)
matches the line resistance. The output voltage is:
V
OUT
= I
OUT
x R
OUT
.
I
OUT
is defined in the reference section. The compliance
range of the output is from -1.5V to 3V, with a 1V
P-P
voltage
swing allowed within this range. However, if it is desired that
the output be offset above zero volts, it is necessary that pin
19 (ARTN) be connected to the same voltage as the load
resistor, not to exceed 3V.
Glitch
The output glitch of the HI5721 is measured by summing the
area under the switching transients after an update of the
DAC. Glitch is caused by the time skew between bits of the
incoming digital data. Typically the switching time of digital
inputs are asymmetrical meaning that the turn off time is
faster than the turn on time (TTL designs). Unequal delay
paths through the device can also cause one current source
to change before another. To minimize this the Intersil
HI5721 employes an internal register, just prior to the current
sources, that is updated on the clock edge. Lastly the worst
case glitch usually happens at the major transition i.e.,
01 1111 1111 to 10 0000 0000. But in the HI5721 the glitch
is moved to the 00 0001 1111 to 11 1110 0000 transition.
This is achieved by the split R/2R segmented current source
architecture. This decreases the amount of current switching
at any one time and makes the glitch practically constant
over the entire output range. By making the glitch a constant
size over the entire output range this effectively integrates
this error out of the end application.
In measuring the output glitch of the HI5721 the output is
terminated into a 64
load. The glitch is measured at the
major carrys throughout the DAC’s output range.
The glitch energy is calculated by measuring the area under
the voltage-time curve. Figure 21 shows the area considered
as glitch when changing the DAC output. Units are typically
specified in picoVolt seconds (pV s).
R
SET
CTRL AMP IN
CTRL AMP
OUT
REF IN
20
19
18
17
HI5721
-0.6 TO -1.2V
1MHz (MAX)
R
SET
R
T
18
FIGURE 19. LOW FREQUENCY MULTIPLYING CIRCUIT
REF IN
17
HI5721
AV
EE
-3.8V
120
50
383
2nF
FIGURE 20. WIDEBAND MULTIPLYING CIRCUIT
TABLE 1. INPUT CODING vs CURRENT OUTPUT
INPUT CODE (D9-D0)
I
OUT
(mA)
I
OUT
(mA)
11 1111 1111
-20.48
0
10 0000 0000
-10.24
-10.24
00 0000 0000
0
-20.48
(20) I
OUT
125MHz
LOW PASS
FILTER
SCOPE
HI5721
64
50
FIGURE 21. GLITCH TEST CIRCUIT
HI5721
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HI5721 | 10-Bit, 125 MSPS, High Speed D/A Converter |
| HI5721-EVS | 10-Bit, 125 MSPS, High Speed D/A Converter |
| HI5721BIP | 10-Bit, 125 MSPS, High Speed D/A Converter |
| HI5728EVAL1 | 10-Bit, 125/60MSPS, Dual High Speed CMOS D/A Converter |
| HI5728 | 10-Bit, 125/60MSPS, Dual High Speed CMOS D/A Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HI5721-EVS | 制造商:Harris Corporation 功能描述: |
| HI5721TMD/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10-Bit Digital-to-Analog Converter |
| HI5728 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:10-Bit, 125/60MSPS, Dual High Speed CMOS D/A Converter |
| HI5728/6IN | 功能描述:DAC DUAL 10BIT 60MHZ 4- LQFP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,400 系列:- 設(shè)置時(shí)間:- 位數(shù):18 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:3 電壓電源:模擬和數(shù)字 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:36-TFBGA 供應(yīng)商設(shè)備封裝:36-TFBGA 包裝:帶卷 (TR) 輸出數(shù)目和類型:* 采樣率（每秒）:* |
| HI5728/6INZ | 功能描述:數(shù)模轉(zhuǎn)換器- DAC W/ANNEAL 48 LQFP IND D/A 10BIT 60MHZ RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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