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參數(shù)資料
| 型號： | HI5714EVAL |
| 廠商： | Intersil Corporation |
| 英文描述： | 8-Bit, 40/60/75/80 MSPS A/D Converter |
| 中文描述： | 8位，40/60/75/80 MSPS的A / D轉(zhuǎn)換 |
| 文件頁數(shù)： | 8/13頁 |
| 文件大?。?/td> | 114K |
| 代理商： | HI5714EVAL |
8
Pin Descriptions
PIN NUMBER
SYMBOL
DESCRIPTION
1, 2, 12-15,
23, 24
D0 to D7
Digital Outputs, D0 (LSB) to D7 (MSB).
4
V
RB
Bottom Reference Voltage Input. Range: 1.2V to 1.6V.
6
AGND
Analog Ground.
7
V
CCA
Analog +5V.
8
V
IN
Analog Input.
9
V
RT
Top Reference Voltage Input. Range: 3.5V to 3.9V.
11
O/UF
Underflow/Overflow Digital Output. Goes high if the analog input goes above or below the
reference (V
RB
, V
RT
) minus the offset.
16
CLK
Clock Input.
17
DGND
Digital GND.
18
V
CCD
Digital +5V.
19, 21
V
CCO1
, V
CCO2
Digital +5V for Digital Output Stage.
20
OGND
Digital Ground for Digital Output Stage.
22
OE
Output Enable
High: Digital outputs are three-stated.
Low: Digital outputs are active.
TABLE 1. A/D CODE TABLE
CODE
DESCRIPTION
(NOTE 1)
INPUT VOLTAGE
V
RT
= 3.6V
V
RB
= 1.3V
O/UF
BINARY OUTPUT CODE
D7
D6
D5
D4
D3
D2
D1
D0
Underflow
<1.555V
1
0
0
0
0
0
0
0
0
0
1.555V
0
0
0
0
0
0
0
0
0
1
-
0
-
-
-
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
-
254
-
0
1
1
1
1
1
1
1
0
255
3.300V
0
1
1
1
1
1
1
1
1
Overflow
>3.300V
1
1
1
1
1
1
1
1
1
NOTE:
1. The voltages listed above represent the ideal transition of each output code shown as a function of the reference voltage, including the
typical reference offset voltages.
TABLE 2. MODE SELECTION
OE
D7 to D0
O/UF
1
High Impedance
High Impedance
0
Active: Binary
Active
HI5714
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