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參數(shù)資料
| 型號： | HI5703 |
| 廠商： | Intersil Corporation |
| 英文描述： | 10-Bit, 40 MSPS A/D Converter |
| 中文描述： | 10位，40 MSPS的A / D轉(zhuǎn)換 |
| 文件頁數(shù)： | 16/18頁 |
| 文件大?。?/td> | 181K |
| 代理商： | HI5703 |
4-16
Full Power Input Bandwidth (FPBW)
Full power input bandwidth is the analog input frequency at
which the amplitude of the digitally reconstructed output has
decreased 3dB below the amplitude of the input sine wave.
The input sine wave has an amplitude which swings from
-FS to +FS. The bandwidth given is measured at the
specified sampling frequency.
Video Definitions
Differential Gain and Differential Phase are two commonly
found video specifications for characterizing the distortion of
a chrominance signal as it is offset through the input voltage
range of an ADC.
Differential Gain (DG)
Differential Gain is the peak difference in chrominance
amplitude (in percent) relative to the reference burst.
Differential Phase (DP)
Differential Phase is the peak difference in chrominance
phase (in degrees) relative to the reference burst.
Timing Definitions
Refer to Figure 1 and Figure 2 for these definitions.
Aperture Delay (t
AP
)
Aperture delay is the time delay between the external
sample command (the falling edge of the clock) and the time
at which the signal is actually sampled. This delay is due to
internal clock path propagation delays.
Aperture Jitter (t
AJ
)
Aperture jitter is the RMS variation in the aperture delay due
to variation of internal clock path delays.
Data Hold Time (t
H
)
Data hold time is the time to where the previous data (N - 1)
is no longer valid.
Data Output Delay Time (t
OD
)
Data output delay time is the time to where the new data (N)
is valid.
Data Latency (t
LAT
)
After the analog sample is taken, the digital data is output on
the bus at the 7th cycle of the clock. This is due to the pipeline
nature of the converter where the data has to ripple through
the stages. This delay is specified as the data latency. After
the data latency time, the data representing each succeeding
sample is output at the following clock pulse. The digital data
lags the analog input sample by 7 cycles.
Power-Up initialization
This time is defined as the maximum number of clock cycles
that are required to initialize the converter at power-up. The
requirement arises from the need to initialize the dynamic
circuits within the converter.
HFA1100
HFA1105
HFA1106
HFA1135
HFA1145
HFA1245
HI5702
HI5703
HSP9501
HSP48410
HSP48908
HSP48212
HSP43891
HSP43168
HSP43216
HI5780
HI1171
CA3338
HA5020
HA2842
HFA1115
HFA1212
HFA1412
HFA1100:
HFA1105:
HFA1106:
HFA1135:
HFA1145:
HFA1245:
HI5702:
HI5703:
HSP9501:
HSP48410: Histogrammer/Accumulating Buffer, 10-Bit Pixel
Resolution
HSP48908: 2-D Convolver, 3 x 3 Kernal Convolution, 8-Bit
850MHz Video Op Amp
300MHz Video Op Amp
250MHz Video Op Amp with Bandwidth Limit Control
350MHz Video Op Amp with Output Limiting
300MHz Video Op Amp with Output Disable
Dual 350MHz Video Op Amp with Output Disable
10-Bit, 40 MSPS, A/D Converter
10-Bit, 40 MSPS, Low Power A/D Converter
Programmable Data Buffer
HSP48212: Digital Video Mixer
HSP43891: Digital Filter, 30MHz, 9-Bit
HSP43168: Dual FIR Filter, 10-Bit, 33MHz/45MHz
HSP43216: Digital Half Band Filter
HI5780:
10-Bit, 80 MSPS, Video D/A Converter
HI1171:
8-Bit, 40 MSPS, Video D/A Converter
CA3338:
8-Bit, 50 MSPS, Video D/A Converter
HA5020:
100MHz Video Op Amp
HA2842:
High Output Current, Video Op Amp
HFA1115:
225MHz Programmable Gain Video Buffer with
Output Limiting
HFA1212:
350MHz, Dual Programmable Gain Video Buffer
HFA1412:
350MHz, Quad Programmable Gain Video Buffer
In addition, CMOS Logic Families in HC/HCT, AC/ACT, FCT and CD4000 are available.
FIGURE 20. 10-BIT VIDEO IMAGING COMPONENTS
DSP/
μ
P
AMP
AMP
D/A
A/D
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HI5703KCB | 10-Bit, 40 MSPS A/D Converter |
| HI5703EVAL | 10-Bit, 40 MSPS A/D Converter |
| HI5710A | 10-Bit, 20 MSPS A/D Converter |
| HI5710AJCQ | Circular Connector; No. of Contacts:32; Series:MS27473; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:18; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:18-32 RoHS Compliant: No |
| HI5714 | 8-Bit, 40/60/75/80 MSPS A/D Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HI5703 HI5705 WAF | 制造商:Intersil Corporation 功能描述: |
| HI5703 WAF | 制造商:Harris Corporation 功能描述: |
| HI5703EVAL | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:10-Bit, 40 MSPS A/D Converter |
| HI5703KCB | 制造商:Rochester Electronics LLC 功能描述:28 SOIC (W) COMTEMP A/D 10BIT 36MSPS 1.0LSB 390MW - Bulk |
| HI5703KCB WAF | 制造商:Harris Corporation 功能描述: |
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