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參數(shù)資料
| 型號(hào)： | HI5702KCB |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | ADC |
| 英文描述： | 10-Bit, 40 MSPS A/D Converter |
| 中文描述： | 1-CH 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 文件頁(yè)數(shù)： | 10/14頁(yè) |
| 文件大?。?/td> | 94K |
| 代理商： | HI5702KCB |
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4-1514
Performance of the HI5702 will only be guaranteed at
conversion rates above 1 MSPS. This ensures proper perfor-
mance of the internal dynamic circuits. Similarly, when
power is first applied to the converter, a maximum of 20
cycles at a sample rate above 1 MSPS will have to be
performed before valid data is available.
Supply and Ground Considerations
The HI5702 has separate analog and digital supply and
ground pins to keep digital noise out of the analog signal
path. The part should be mounted on a board that provides
separate low impedance connections for the analog and
digital supplies and grounds. For best performance, the sup-
plies to the HI5702 should be driven by clean, linear regu-
lated supplies. The board should also have good high
frequency decoupling capacitors mounted as close as possi-
ble to the converter. If the part is powered off a single supply
then the analog supply and ground pins should be isolated
by ferrite beads from the digital supply and ground pins.
Refer to the Application Note “Using Intersil High Speed A/D
Converters” (AN9214) for additional considerations when
using high speed converters.
Increased Accuracy
The V
OS
and FSE errors as reported on the data sheet can
be decreased by further calibration of the ADC. It will be
assumed that the converter has offset binary coding. See
the A/D code table (Table 2) for the ideal code transitions.
The first step would be to center the analog input to the
desired midscale voltage. This voltage would then be
adjusted up or down in the circuitry driving one side of the
input to the HI5702 until the 511 to 512 transition occurs on
the digital output.
Next, set the analog input to the HI5702 to the desired posi-
tive fullscale voltage. Adjust one side of the reference circuit
up or down until the 1022 to 1023 transition occurs on the
digital output of the converter.
Static Performance Definitions
Offset Error (V
OS
)
The midscale code transition should occur at a level
1
/
4
LSB
above half-scale. Offset is defined as the deviation of the
actual code transition from this point.
Full-Scale Error (FSE)
The last code transition should occur for a analog input that
is 1
3
/
4
LSBs below positive full-scale with the offset error
removed. Full-scale error is defined as the deviation of the
actual code transition from this point.
Differential Linearity Error (DNL)
DNL is the worst case deviation of a code width from the
ideal value of 1 LSB.
Integral Linearity Error (INL)
INL is the worst case deviation of a code center from a best
fit straight line calculated from the measured data.
Power Supply Rejection Ratio (PSRR)
Each of the power supplies are moved plus and minus 5%
and the shift in the offset and gain error (in LSBs) is noted.
Dynamic Performance Definitions
Fast Fourier Transform (FFT) techniques are used to evalu-
ate the dynamic performance of the HI5702. A low distortion
sine wave is applied to the input, it is coherently sampled,
and the output is stored in RAM. The data is then trans-
formed into the frequency domain with an FFT and analyzed
to evaluate the dynamic performance of the A/D. The sine
wave input to the part is -0.5dB down from full-scale for all
these tests.
SNR and SINAD are quoted in dB. The distortion numbers are
quoted in dBc (decibels with respect to carrier) and
DO NOT
include any correction factors for normalizing to full scale.
TABLE 2. A/D CODE TABLE
CODE
DESCRIPTION
(NOTE 1)
DIFFERENTIAL
INPUT VOLTAGE
V
REF
+ = 3.25V
V
REF
- = 2.0V
(V)
OFFSET BINARY OUTPUT CODE
(DFS LOW)
TWO’S COMPLEMENT OUTPUT CODE
(DFS HIGH)
M
S
B
L
S
B
M
S
B
L
S
B
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Full Scale (FS)
1.25V
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
FS - 1
3
/
4
LSB
1.2479V
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
0
1
/
2
FS +
1
/
4
LSB
0.3mV
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
/
2
FS -
3
/
4
LSB
2.1mV
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
/
4
LSB
-1.2485V
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
1
Zero
-1.25V
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
NOTE:
1. The voltages listed above represent the ideal transition of each output code shown as a function of the reference voltage.
HI5702
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| HI5728IN-T | 10-Bit Digital-to-Analog Converter |
| HI5721BIB | 10-Bit, 125 MSPS, High Speed D/A Converter |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HI5702KCB WAF | 制造商:Harris Corporation 功能描述: |
| HI5703 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:10-Bit, 40 MSPS A/D Converter |
| HI5703 HI5705 WAF | 制造商:Intersil Corporation 功能描述: |
| HI5703 WAF | 制造商:Harris Corporation 功能描述: |
| HI5703EVAL | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:10-Bit, 40 MSPS A/D Converter |
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